Electronics Manufacturing Technology Symposium, 1995. 'Manufacturing Technologies - Present and Future', Seventeenth IEEE/CPMT International

2-4 Oct. 1995

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  • Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (456 KB)
    Freely Available from IEEE
  • Manufacturing ownership through process re-engineering

    Publication Year: 1995
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (52 KB)

    Summary form only given. This paper explains the process being used at the IBM electronic card and test facility in Austin, Texas to gain ownership and commitment through the involvement of manufacturing personnel in process re-engineering. The approach is simple and straight-forward, encompassing shared vision and values, organization, staffing, roles and responsibilities, measurements and the ma... View full abstract»

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  • Electrical performance trade-offs in ball grid array package designs

    Publication Year: 1995
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (48 KB)

    Summary form only given, as follows. Many new types of ball grid array packages have been introduced or proposed in the last year as alternatives to PQFPs and PGAs. These include single and multilayer configurations for both plastic and metal BGAs based on a variety of material and process technologies. A commonly claimed advantage of all these BGAs is improved electrical performance. With continu... View full abstract»

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  • Author index

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (145 KB)
    Freely Available from IEEE
  • Technology/strategy management issues for semiconductor technology

    Publication Year: 1995, Page(s):495 - 501
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB)

    For more than forty years continuous improvements in semiconductor technology have driven major performance and value for money improvements into a broad range of industries. In particular both sold state memory and microprocessors have been major benefactors from design and process improvements and contributors to this widespread success and penetration of microelectronics into our lives. The res... View full abstract»

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  • The impact of single-wafer processing on fab cycle time

    Publication Year: 1995, Page(s):488 - 494
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (680 KB)

    Rapid thermal processing is already the convention for processes such as silicide annealing, and is being studied as an alternative for virtually every other thermal process in modern CMOS process flows. Single-wafer cleaning is also a broad area of research and development, both in industry and academia, although single-wafer cleaning is not as mature a technology as rapid thermal processing. Thi... View full abstract»

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  • Run by run (generalized SPC) control of semiconductor processes on the production floor

    Publication Year: 1995, Page(s):60 - 64
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (464 KB)

    Multiple linear response surface methodology coupled with run by run (generalized SPC) control has been applied at Delco Electronics to a high volume production epitaxy deposition process. This resulted in nearly a 1.8× improvement in process capability for thickness control. This was achieved by interfacing an IBM compatible 486 computer to Gemini II epi reactors, translating Sun workstatio... View full abstract»

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  • An overview of manufacturing BGA technology

    Publication Year: 1995, Page(s):434 - 437
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (624 KB)

    Ball Grid Array (BGA) technology is one ofthe leading edge technologies in surface mount manufacturing. The driving force behind the advancement of BGA technology is the lead spacing of standard surface mount devices. As lead pitches drop below 20 mil, manufacturing becomes exponentially more difficult. BGA technology provides the same I/O count in the same body size with a significant increase in... View full abstract»

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  • Real-time diagnosis of semiconductor manufacturing equipment using neural networks

    Publication Year: 1995, Page(s):224 - 231
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1040 KB)

    This paper presents a tool for the real-time diagnosis of integrated circuit fabrication equipment. The approach focuses on integrating neural networks into a knowledge-based expert system. The system employs evidential reasoning to identify malfunctions by combining evidence originating from equipment maintenance history, on-line sensor data, and in-line past-process measurements. Neural networks... View full abstract»

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  • LSM vision gage R&R study

    Publication Year: 1995, Page(s):402 - 409
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (424 KB)

    The purpose of this study is to assess whether the laser scanning microscope (LSM) is capable of measuring solder paste height. The LSM projects a scanning laser beam onto the PC board which is deflected around the solder paste deposit. The height of the paste was determined by taking the difference between the highest (top) and lowest (bottom) laser deflection points on and surrounding the paste ... View full abstract»

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  • Batchless factory concept for very short cycle time semiconductor manufacturing

    Publication Year: 1995, Page(s):486 - 487
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (200 KB)

    The focus of this paper is a processing concept that moves the thermal processing steps out of the semiconductor fabrication facility, dramatically simplifying the front end of line processing and facilitating single wafer processing to potentially achieve a very short manufacturing process cycle time. In the batchless factory concept wafers would be preprocessed before entering the semiconductor ... View full abstract»

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  • How TOC & TPM work together to build the quality toolbox of SDWTs

    Publication Year: 1995, Page(s):56 - 59
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB)

    This paper details activities targeted at improving task behaviors within self-directed work teams (SDWTs), which subsequently improve productivity and quality within the factory. Like many companies, Harris Semiconductor manages its resources to improve productivity and lower manufacturing costs. One major initiative employed at Harris, Theory of Constraints (TOC), focuses on increased throughput... View full abstract»

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  • Optimization of solder paste printability with laser inspection technique

    Publication Year: 1995, Page(s):361 - 365
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    This paper describes an evaluation technique for solder paste printability using a solder paste inspection system and optimization of printing parameters. In a Surface Mount Assembly (SMA), it is very important to evaluate printability of solder paste precisely, because printability of solder paste directly influences reflow soldering quality. We established quite reliable inspection criteria for ... View full abstract»

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  • Advanced interconnect and low cost μ stud BGA

    Publication Year: 1995, Page(s):428 - 433
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    The μ stud BGA is designed to reduce the number of interconnects for higher reliability and low cost. The manufacturing processes of conventional lead-frame are applied to make a high pin count package. Numerous studs are laid out around the LSI's pad area in 0.5 mm pitch for wire bonding. The bottoms of the studs are directly connected to the substrate by micro-soldering. The μ stud BGA has... View full abstract»

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  • Development of integrated process control system utilizing neural network for plasma etching

    Publication Year: 1995, Page(s):218 - 223
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (456 KB)

    The purpose of this study is to provide the integrated process control system utilizing neural network modeling, to search for the appropriate choice of control input, and to keep the process output within the desired range in the real etch process. Variations in the process output are classified as the drift and the shift. The drift is caused by a natural noise that changes over a period of time ... View full abstract»

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  • Effective modeling of factory throughput times

    Publication Year: 1995, Page(s):377 - 383
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (672 KB)

    Describes an effective approach to TPT modeling. Though this approach can be used in any factory, our focus here is limited to predicting TPT in a semiconductor wafer fabrication facility. We describe an abstract simulation that runs very quickly on standard PCs and is based on a model that focuses on the factors that have a major influence on TPT. The simple model includes machine assignments and... View full abstract»

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  • A robust metric for measuring within-wafer uniformity

    Publication Year: 1995, Page(s):396 - 401
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (544 KB)

    A robust metric for measuring within-wafer uniformity has been developed and compared to the traditional SNR metric. The new statistic, referred to as the integration statistic, is based on the integration of the volumetric error between the target and the actual surfaces. Comparison with the traditional SNR uniformity metric indicates that the integration statistic provides a more consistent esti... View full abstract»

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  • Ericsson's VLSI mini-fab strategy; low volume VLSI fab to ensure short time to market for Ericsson telecom systems and products

    Publication Year: 1995, Page(s):482 - 485
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1040 KB)

    Ericsson adopted a rather different approach when it planned a submicron fab at its Kista site in Sweden. Wafer manufacturing volumes were less important than time factors, since the principal role of the fab is to reduce the design and manufacturing lead times for the complex ASICs needed in the company's telecommunications products and systems. In this paper, the author describes Ericsson's rath... View full abstract»

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  • Reusable modeling capabilities for simulating high volume electronics manufacturing systems

    Publication Year: 1995, Page(s):179 - 186
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1024 KB)

    This paper introduces modeling tools, developed in conjunction with personnel at Chrysler's Huntsville Electronics Division (HED), for the rapid modeling and analysis of high volume electronics production lines. The tools that are discussed include a Windows-based line definition program and static capacity evaluator with proposed links to a custom simulation package as well as the increasingly po... View full abstract»

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  • Measurement of solder paste component retention properties

    Publication Year: 1995, Page(s):351 - 360
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1024 KB)

    Systematically evaluated the IPC-SP-819 tack test method. The study identified the factors that influenced the measurement and estimated their effect on the tack strength. An alternate tack test method that uses a shear tester was identified. Tack life measurements were conducted for six different solder pastes using the IPC, the modified IPC, and the shear tack test methods. The test results were... View full abstract»

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  • Issues in low-cost manufacture of reliable optoelectronic systems

    Publication Year: 1995, Page(s):460 - 470
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    A product with high assembly efficiency will, in general, have a low defect count. So, it may be expected that the application of DFA would improve the reliability of optoelectronic systems. Nevertheless, detailed reliability assessment of the product is necessary during the product design and development phase either to compare alternate designs or to assess potential reliability problems in a ca... View full abstract»

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  • Area bonding conductive epoxy adhesives for low cost grid array chip carriers

    Publication Year: 1995, Page(s):422 - 427
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (984 KB)

    This paper describes a new type of Z axis epoxy film adhesive, called a_rea b_onding c_onductive (ABC) epoxies, to replace solder and solder balls for surface mounting grid array chip carriers. The ABC adhesives are made by a low cost screen printing process, starting from customer-supplied artwork, so that the conductive epoxy regions are located only at the desired bond pad ... View full abstract»

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  • Plasma process control with optical emission spectroscopy

    Publication Year: 1995, Page(s):166 - 169
    Cited by:  Papers (4)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (328 KB)

    Plasma processes for etching and desmear of electronic components and printed wiring boards (PWB) are difficult to predict and control. Non-uniformity of most plasma processes and sensitivity to environmental changes make it difficult to maintain process stability from day to day. To assure plasma process performance, weight loss coupons or post-plasma destructive testing must be used. The problem... View full abstract»

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  • Estimating tools to support multi-path agility in electronics manufacturing

    Publication Year: 1995, Page(s):38 - 46
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    Electronics manufacturing will increasingly require shorter cycle times for product development and manufacturing, lower volumes of identical items, increased customization, higher quality, and closer coupling among suppliers, customers and manufacturers. This trend is being driven by the demands of the global marketplace as customers demand newer, more compact, lower cost, and higher quality prod... View full abstract»

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  • Designing response surface model based Run by Run controllers: a new approach

    Publication Year: 1995, Page(s):210 - 217
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (536 KB)

    This paper presents a framework for carrying out robust Run by Run (RbR) control via a set-theoretic approach. In particular the RbR controller developed tries to minimize the worst case performance of the plant. This gives us a methodology to handle uncertainty. An interesting consequence of using the set valued approach is that now we can relax the assumptions made on the statistics of the noise... View full abstract»

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