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Multi-Chip Module Conference, 1992. MCMC-92, Proceedings 1992 IEEE

Date 18-20 March 1992

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Displaying Results 1 - 25 of 46
  • Proceedings. 1992 IEEE Multi-Chip Module Conference MCMC-92 (Cat. No.92CH3124-5)

    Publication Year: 1992
    Request permission for commercial reuse | PDF file iconPDF (32 KB)
    Freely Available from IEEE
  • Analysis of MCMs using asymptotic waveform evaluation (AWE)

    Publication Year: 1992, Page(s):48 - 51
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    Asymptotic waveform evaluation (AWE) is a new method of efficiently analyzing linear circuits. The authors illustrate the applicability of AWE to the analysis of multichip module (MCM) interconnect structures from chip level through packaging, through thick or thin film interconnect and back again. The algorithm is described. Many extensions have been made to the AWE algorithm to render it more su... View full abstract»

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  • Chip on tape qualification and reliability

    Publication Year: 1992, Page(s):72 - 74
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (172 KB)

    High-density and high-leadcount chip on tape (COT) technology is emerging as an attractive component for high-performance multichip module applications. A hermetic sealed semiconductor die with gold bump terminations over SiO2 and Si3N4 passivations was bonded to a gold-plated copper tape, using a thermal compression gang bonding technique. The device was subsequen... View full abstract»

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  • Boundary-scan test structures and test-bench compilation in a multichip module synthesis system

    Publication Year: 1992, Page(s):44 - 47
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    The authors present a testing methodology for multichip module (MCM) designs, which were automatically generated by a behavioral synthesis system. The testability of the design was enhanced by automatic insertion of boundary scan architecture in every chip of the MCM design. The test vectors for the synthesized design were automatically derived from the behavioral test vectors, which were used to ... View full abstract»

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  • Yield modeling of MCM assembly with flip-chip thermocompression bondings

    Publication Year: 1992, Page(s):68 - 71
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    Flip-chip connections using gold-to-gold, gold-to-aluminum, or gold-to-solder bondings or contacts enhanced by epoxy are low-cost alternatives to soldering. A yield model has been developed for flip-chip, thermocompression bondings. The model predicts the assembly yield as a function of forces and planarities of the end effector, bump height variations, bump geometries, mechanical properties corre... View full abstract»

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  • Perspectives on multi-chip modules: substrate alternatives

    Publication Year: 1992, Page(s):12 - 15
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (420 KB)

    A summary of the multichip module (MCM) features commonly mentioned in the literature and by designers, users, and would-be users is given. The current assessment of the many advantages offered by MCM-D indicates the technology will fill the needs of high-performance systems well into the future, but printed wiring board (PWB) modules (MCM-L) can provide solutions now. The rationale for expanded u... View full abstract»

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  • Fine pitch pad array carrier sockets for multichip modules

    Publication Year: 1992, Page(s):40 - 43
    Cited by:  Papers (1)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (336 KB)

    A project is currently under way to develop two pad array carrier (PAC) multichip modules using Motorola's H4C123 ASIC family as a test vehicle. A brief summary of Motorola's multichip module test vehicle is first presented. Then, a comparison of three different connector technologies is provided. A limited number of socket manufacturers were evaluated. The main parameters considered from vendor t... View full abstract»

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  • Assembly and reliability of micro-scale solder interconnections for flip-chip MCMs

    Publication Year: 1992, Page(s):64 - 67
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (372 KB)

    The essential features of a high-yield, cost-effective flip-chip multichip module (MCM) fabrication process using automated, whole wafer assembly are discussed. Tests demonstrating (1) superior cleanability of a new AT&T-YD flux as defined by wetting angle measurements and (2) the robust reflow realignment of flip-chip joints assembled using this flux are described and their results reported i... View full abstract»

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  • Silicon-on-silicon technology for CMOS-based computer systems

    Publication Year: 1992, Page(s):8 - 11
    Cited by:  Papers (4)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (420 KB)

    The main features of Si-on-Si technology are outlined. The electrical design of the wiring substrate is described, and chip connection and thermal design issues are addressed. Several options for mechanically supporting a large Si substrate are considered. A digital signal processing module developed using chip-on-wafer technology is discussed as an example. AlN ceramic was found to be an excellen... View full abstract»

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  • MCM prototyping using overlay interconnect process

    Publication Year: 1992, Page(s):36 - 39
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    The construction of complex multichip modules requires a means of evaluating the prototype for correct operation and characterization. A flexible prototype method is described, using the overlay interconnect approach, for probing and verification. The overlay process builds the interconnect over the top of a bare die. An overview of the process is given. The overlay interconnect method has several... View full abstract»

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  • On the study of skin-effect and dispersion of heavily lossy transmission lines

    Publication Year: 1992, Page(s):60 - 63
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (172 KB)

    A special case of a circular coaxial cable with heavy conduction loss was studied by full-wave analysis, and compared with the quasi-transverse electromagnetic (TEM) solutions. It was found that at high frequencies the tangential electrical fields will be much greater than the values reported in the literature. Despite relatively strong longitudinal E-fields and radial currents, the comparison rev... View full abstract»

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  • Full wave electrical modeling of MCM by robust design methodology

    Publication Year: 1992, Page(s):83 - 85
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (200 KB)

    The author describes the modeling of a glass ceramic multichip module (MCM) by using statistical design techniques. The electrical design of the MCM was achieved by a robust design technique using a full-wave electromagnetic solver. The design point was determined by modeling a five-level fractional factorial matrix covering the full range of the process capabilities. The design point yielded a 50... View full abstract»

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  • MCM and monolithic VLSI perspectives on dependencies, integration, performance and economics

    Publication Year: 1992, Page(s):4 - 7
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    It is argued that multichip module (MCM) technologies, tools, and infrastructures are still lacking, while monolithic VLSIs have continued to progress for the past two decades, delivering greater functionality and higher performance at lower cost. The author offers perspectives on the performance and economics of MCMs and VLSIs. In particular, he examines the dependencies and contrasts the competi... View full abstract»

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  • Die for MCMs: IC preparation for testing, analysis and assembly

    Publication Year: 1992, Page(s):32 - 35
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    A method of die preparation for test, analysis and burn-in is described that can begin to address multichip module (MCM) infrastructure requirements for obtaining known good die. The process developed provides full functional component testing, timing analysis at speed, and burn-in of ICs prior to MCM insertion. A soluble polymer overlay was coated on the die surface and patterned with new top lev... View full abstract»

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  • Simulation and optimization of interconnect delay and crosstalk in multi-chip modules

    Publication Year: 1992, Page(s):56 - 59
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    As signal speeds increase, interconnect effects such as delay, distortion and crosstalk become the dominant factor limiting the overall performance of a multichip module. The authors outline efficient techniques recently developed for addressing three specific aspects of the high-speed interconnect problem, namely, simulation, sensitivity analysis and performance optimization. These techniques acc... View full abstract»

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  • Delay macromodels for point-to-point MCM interconnections

    Publication Year: 1992, Page(s):79 - 82
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    Dimensional analysis is used to develop a macromodel for point-to-point multichip module (MCM) interconnect delay, which applies to lossless and lossy lines. The equation for lossless lines is linear and very simple; the equation for lossy lines is quadratic. In terms of computational costs, the evaluation of delay involves 24 multiplications, and is several orders of magnitude faster than using c... View full abstract»

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  • Bare die testing and MCM probing techniques

    Publication Year: 1992, Page(s):20 - 23
    Cited by:  Papers (16)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (304 KB)

    The author discusses two important issues regarding the development and manufacture of multichip modules (MCMs). First, a method is described which is used for testing bare chips at the full operating frequency and over temperature extremes. This approach utilizes a modified wafer probe system and a high-speed digital tester for at-speed performance characterization of individual chips prior to in... View full abstract»

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  • An integrated approach for electrical performance analysis of multichip modules

    Publication Year: 1992, Page(s):90 - 93
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (200 KB)

    The authors describe an integrated approach to evaluate the electrical performance of multichip modules. A software system consisting of modeling and simulation tools to extract geometry from a placement and routing system, compute electrical parasiticsm, and create equivalent circuit files to perform circuit simulations has been developed. This tool was used in designing an i486 microprocessor-ba... View full abstract»

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  • Trends in processor and system design and the interaction with advanced packaging

    Publication Year: 1992, Page(s):1 - 3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB)

    The author briefly looks at trends in microprocessor development and system architecture. A detailed discussion of the system designer's challenges and of how an advanced packaging technology might help is presented. Trends in processor design, trends in system design, and opportunities and challenges for packaging technology are considered View full abstract»

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  • Array probe card

    Publication Year: 1992, Page(s):28 - 31
    Cited by:  Papers (9)  |  Patents (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    By utilizing conventional IC processing techniques, a membrane probe card has been fabricated on a silicon wafer and its functionality demonstrated. The probe card was able to provide a very large number of probe tips in an array form, permanently fixed in the X-Y plane via a transparent, flexible membrane. The use of an electrical current pulse, instead of a mechanical scrubbin... View full abstract»

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  • High-performance MCM interconnection circuits and fluxoelectronics

    Publication Year: 1992, Page(s):175 - 178
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (420 KB)

    The authors describe the benefits of air-dielectric interconnections and fluxoelectronic interconnection circuits in high-performance multichip modules (MCMS). Not only do superconductors provide low-loss, dispersionless interconnection, but they also provide low-power, high-speed alternatives to conventional interconnection circuits. The low current levels in fluxoelectronic methods and low-volta... View full abstract»

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  • High-density, array, optical interconnects for multi-chip modules

    Publication Year: 1992, Page(s):142 - 145
    Cited by:  Papers (3)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (200 KB)

    A compact, planar-processed package using flip-chip, self-aligned optoelectronic components is described. The optoelectronic module contains both a four-channel AlGaAs laser transmitter and a four-channel GaAs MESFET integrated detector/preamp receiver on a single substrate. The optical waveguides act as an optical bench which mechanically aligns the optoelectronic components, waveguides, and off-... View full abstract»

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  • IBM ES/9000 buried engineering change modeling for verification [MCM]

    Publication Year: 1992, Page(s):167 - 170
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (292 KB)

    Buried engineering change (BEC) is a method of laying out engineering change (EC) wires within a multichip module (MCM) at the original building time for later use. The authors discuss the modeling used to accurately predict delay, validate electrical integrity, and add a degree of flexibility to the wiring process. The purpose of developing this BEC modeling methodology was to provide fast, accur... View full abstract»

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  • Early system analysis of cache performance for RISC systems

    Publication Year: 1992, Page(s):130 - 133
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    The implications of packaging and interconnection technologies for reduced instruction set computing (RISC) microprocessor memory hierarchies are examined. Prior early analysis tools have taken either cache performance or interconnection models into consideration. Here such analyses are combined and extended to be more specific to RISC microprocessor cache systems. The resulting first-order model ... View full abstract»

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  • Pade approximation applied to transient simulation of lossy coupled transmission lines

    Publication Year: 1992, Page(s):52 - 55
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    A new approach for transient simulation of lossy coupled transmission lines terminated in arbitrary nonlinear elements is presented. The approach is based on convolution simulation. The multiconductor lines are first decoupled to obtain modal functions. Using the Pade approximations of each modal function, the authors derive a recursive convolution formulation, which greatly reduces the computatio... View full abstract»

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