By Topic

Multi-Chip Module Conference, 1992. MCMC-92, Proceedings 1992 IEEE

Date 18-20 March 1992

Filter Results

Displaying Results 1 - 25 of 46
  • Proceedings. 1992 IEEE Multi-Chip Module Conference MCMC-92 (Cat. No.92CH3124-5)

    Publication Year: 1992
    Save to Project icon | Request Permissions | PDF file iconPDF (32 KB)  
    Freely Available from IEEE
  • System partitioning for multi-chip modules under timing and capacity constraints

    Publication Year: 1992 , Page(s): 123 - 126
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    The authors propose an efficient and effective algorithm for system partitioning under timing and capacity constraints. They consider the problem of assigning functional blocks into slots on multi-chip modules in high-level design to have fast feedback on the impact of high-level design decisions. A clustering step is used to ensure timing correctness, followed by packing and the K&L algorithm to satisfy capacity constraints while minimizing net crossings. The method is unique in that net crossings are minimized, while satisfying timing and capacity constraints. Test results showed that the method eliminated timing violations and obtained a comparable number of net crossings to that of the algorithm proposed by C.M. Fiduccia and R.M. Mattheyses (1982) with a similar run time. The method can be extended to use partitioning algorithms other than that of Fiduccia and Mattheyses View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Rapid prototyping of multi-chip modules

    Publication Year: 1992 , Page(s): 163 - 166
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (368 KB)  

    The authors describe a rapid prototyping methodology for multichip modules, based upon laser processes for linking and cutting conductors. They discuss some of the design and test issues involved in this approach. Results are presented of efforts to independently demonstrate each component technology View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Delay macromodels for point-to-point MCM interconnections

    Publication Year: 1992 , Page(s): 79 - 82
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (244 KB)  

    Dimensional analysis is used to develop a macromodel for point-to-point multichip module (MCM) interconnect delay, which applies to lossless and lossy lines. The equation for lossless lines is linear and very simple; the equation for lossy lines is quadratic. In terms of computational costs, the evaluation of delay involves 24 multiplications, and is several orders of magnitude faster than using circuit simulation or transmission line analysis programs to calculate delays. Using the macromodel, the authors derived the dependence of delay on several technology parameters, and calculated the sensitivity of delay to the circuit parameters View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Trends in processor and system design and the interaction with advanced packaging

    Publication Year: 1992 , Page(s): 1 - 3
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (212 KB)  

    The author briefly looks at trends in microprocessor development and system architecture. A detailed discussion of the system designer's challenges and of how an advanced packaging technology might help is presented. Trends in processor design, trends in system design, and opportunities and challenges for packaging technology are considered View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Full wave electrical modeling of MCM by robust design methodology

    Publication Year: 1992 , Page(s): 83 - 85
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (200 KB)  

    The author describes the modeling of a glass ceramic multichip module (MCM) by using statistical design techniques. The electrical design of the MCM was achieved by a robust design technique using a full-wave electromagnetic solver. The design point was determined by modeling a five-level fractional factorial matrix covering the full range of the process capabilities. The design point yielded a 50-Ω characteristic impedance and a near-end noise of <5% of the logic swing View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Yield and reliability concerns in polyimide based multi-chip modules

    Publication Year: 1992 , Page(s): 98 - 101
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (272 KB)  

    The key technology elements used in the fabrication of a high-performance, low-cost silicon-on-silicon multichip module (MCM) are described. Al/PI multilayer substrates, flip-chip soldering of chips to substrate, and wire bonding of substrate to a ceramic pin grid array (PGA) package were the various interconnection elements used. Some of the yield and reliability issues encountered in the manufacture of the substrates, the flip-chip process, and wire bonding of the Al/PI structures are discussed, and process changes made to solve some of these problems are presented View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Optical interfaces for multichip modules

    Publication Year: 1992 , Page(s): 150 - 153
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (372 KB)  

    An approach to an interconnection scheme for multichip modules (MCMs) based on the use of single-mode optical fiber and long-wavelength (1.3 μm) semiconductor diode lasers is described. The author considers some of the requirements of a fiber-based interconnection scheme applicable to MCM technology. For MCM interconnection work, many mechanical alignments and materials interfaces can be eliminated by mounting components on a silicon substrate. The development of a silicon waferboard approach has concentrated initially on the development of passively aligned transmitter arrays as a critical test of this technology. The addition of waveguide technology to a silicon waferboard can expand considerably the functionality and flexibility of this technology. Transmitter array development is considered. A completed transmitter array with an array of four passively aligned lasers and fibers along with a GaAs laser driver array is shown View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • MCM and monolithic VLSI perspectives on dependencies, integration, performance and economics

    Publication Year: 1992 , Page(s): 4 - 7
    Cited by:  Papers (15)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (360 KB)  

    It is argued that multichip module (MCM) technologies, tools, and infrastructures are still lacking, while monolithic VLSIs have continued to progress for the past two decades, delivering greater functionality and higher performance at lower cost. The author offers perspectives on the performance and economics of MCMs and VLSIs. In particular, he examines the dependencies and contrasts the competitiveness between these two integration technologies. The analysis points to opportunities and action agendas for MCMs. It is concluded that the MCM is an important system integration technology that, if properly utilized, can provide significant added value. It should not be approached as a VLSI replacement. Rather, it should be used as an important adjunct to VLSIs View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Multichip module enables for high reliability applications

    Publication Year: 1992 , Page(s): 102 - 105
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (328 KB)  

    To gain uniform, rigorous multichip module (MCM) qualification for high-reliability applications, Sandia has developed: a set of assembly test chips which are available for manufacturers and users to evaluate, characterize, and compare the particular MCM technology in terms of materials, chemical aging, geometries, stress state, thermal management, and assembly techniques; standard interconnect test structures as test coupons on the MCM substrate to determine the aging reliability through accelerated aging and lot quality through statistics; and exhaustive chip pretest methodology through prepackaging in a way compatible with today's military IC packaging assembly lines. The MCM substrate test structures and packaging for chip pretest are discussed View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Array probe card

    Publication Year: 1992 , Page(s): 28 - 31
    Cited by:  Papers (9)  |  Patents (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (264 KB)  

    By utilizing conventional IC processing techniques, a membrane probe card has been fabricated on a silicon wafer and its functionality demonstrated. The probe card was able to provide a very large number of probe tips in an array form, permanently fixed in the X-Y plane via a transparent, flexible membrane. The use of an electrical current pulse, instead of a mechanical scrubbing motion, to break down the interfacial oxide has been demonstrated. The contact resistance was about 5×10-5 Ω-cm2. The new probe card offers smaller probe parasitics. The addition of the active test circuitry on the probe card would allow very high speed wafer level testing View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Chip on tape qualification and reliability

    Publication Year: 1992 , Page(s): 72 - 74
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (172 KB)  

    High-density and high-leadcount chip on tape (COT) technology is emerging as an attractive component for high-performance multichip module applications. A hermetic sealed semiconductor die with gold bump terminations over SiO2 and Si3N4 passivations was bonded to a gold-plated copper tape, using a thermal compression gang bonding technique. The device was subsequently encapsulated and marked. The authors first review the bump design rules, bump characteristics, and the inner lead bond process. The reliability test results of COT devices are presented View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A multi-chip module for hand-held digital cellular mobile telephone

    Publication Year: 1992 , Page(s): 115 - 118
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (232 KB)  

    The design of a dedicated multichip module (MCM) for hand-held digital cellular telephones is presented. It uses the silicon-on-silicon, flip-chip MCM technology. The MCM contains one gallium arsenide and seven CMOS VLSI chips and performs receive front-ending, all baseband signal processing, and system control functions. High frequency effects are briefly discussed View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Pade approximation applied to transient simulation of lossy coupled transmission lines

    Publication Year: 1992 , Page(s): 52 - 55
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (280 KB)  

    A new approach for transient simulation of lossy coupled transmission lines terminated in arbitrary nonlinear elements is presented. The approach is based on convolution simulation. The multiconductor lines are first decoupled to obtain modal functions. Using the Pade approximations of each modal function, the authors derive a recursive convolution formulation, which greatly reduces the computation used to perform convolutions. The approach can handle general coupling situations; no assumption on the simulated circuits is introduced. The approach was implemented in the Stepwise Equivalent Conductance MOS timing simulator, SWEC. The key feature of SWEC is that Newton-Raphson iteration is not needed for the implicit integration of a circuit even with lossy lines terminated in nonlinear elements. The comparisons with SPICE3.e indicated that SWEC can be one to two orders of magnitude faster View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • High-density, array, optical interconnects for multi-chip modules

    Publication Year: 1992 , Page(s): 142 - 145
    Cited by:  Papers (1)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (200 KB)  

    A compact, planar-processed package using flip-chip, self-aligned optoelectronic components is described. The optoelectronic module contains both a four-channel AlGaAs laser transmitter and a four-channel GaAs MESFET integrated detector/preamp receiver on a single substrate. The optical waveguides act as an optical bench which mechanically aligns the optoelectronic components, waveguides, and off-module fiber ribbon connector interface. Preliminary measurements have been carried out by operating the packaged receiver arrays with a commercially available reference laser source at a data rate of 1 Gb/s. Results are reported View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Silicon-on-silicon MCMs with integrated passive components

    Publication Year: 1992 , Page(s): 155 - 158
    Cited by:  Papers (32)  |  Patents (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (292 KB)  

    The authors evaluate a prototype silicon-on-silicon multichip module for potential use in cost-driven applications. The incorporation of integrated passive components, resistors and capacitors, in the module substrate is a significant advantage in many of these kinds of applications. A module has been built that incorporates both linear and bipolar and digital CMOS circuits. The unique features of the module are discussed, as well as the properties and performance limits of the resulting passive components View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • On the study of skin-effect and dispersion of heavily lossy transmission lines

    Publication Year: 1992 , Page(s): 60 - 63
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (172 KB)  

    A special case of a circular coaxial cable with heavy conduction loss was studied by full-wave analysis, and compared with the quasi-transverse electromagnetic (TEM) solutions. It was found that at high frequencies the tangential electrical fields will be much greater than the values reported in the literature. Despite relatively strong longitudinal E-fields and radial currents, the comparison revealed that, provided the circuit parameters are properly evaluated, the errors introduced by a simple distributed circuit model under the quasi-TEM assumption are not excessively large. Therefore, the telegraphist's equations may give good results up to frequencies of 10 GHz or higher for transmission lines of small geometries commonly found in microelectronics packaging. A second case of three coupled microstrips of rectangular cross-section was also analyzed and compared with network measurements. It was found that the dispersion occurring in microelectronics packaging interconnects at frequencies up to the microwave band is anomalous View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Simulation and optimization of interconnect delay and crosstalk in multi-chip modules

    Publication Year: 1992 , Page(s): 56 - 59
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (224 KB)  

    As signal speeds increase, interconnect effects such as delay, distortion and crosstalk become the dominant factor limiting the overall performance of a multichip module. The authors outline efficient techniques recently developed for addressing three specific aspects of the high-speed interconnect problem, namely, simulation, sensitivity analysis and performance optimization. These techniques accommodate distributed interconnect models represented by lossy coupled transmission lines. Two examples showing the applications of these techniques are included View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Silicon-on-silicon technology for CMOS-based computer systems

    Publication Year: 1992 , Page(s): 8 - 11
    Cited by:  Papers (4)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    The main features of Si-on-Si technology are outlined. The electrical design of the wiring substrate is described, and chip connection and thermal design issues are addressed. Several options for mechanically supporting a large Si substrate are considered. A digital signal processing module developed using chip-on-wafer technology is discussed as an example. AlN ceramic was found to be an excellent packaging material to mechanically support a large Si substrate with high reliability View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Effect of humidity cycling on reliability of overlaid high density interconnects

    Publication Year: 1992 , Page(s): 106 - 108
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (188 KB)  

    The authors present a finite element simulation, performed to observe the stresses generated in a typical high-density interconnect structure as a result of swelling mismatches due to water absorption. They focus on stresses which could cause de-adhesion and microbuckling of dielectric films due to humidity cycling. Numerical analysis was used to examine the potential failure sites, modes, and failure mechanisms View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Perspectives on multi-chip modules: substrate alternatives

    Publication Year: 1992 , Page(s): 12 - 15
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    A summary of the multichip module (MCM) features commonly mentioned in the literature and by designers, users, and would-be users is given. The current assessment of the many advantages offered by MCM-D indicates the technology will fill the needs of high-performance systems well into the future, but printed wiring board (PWB) modules (MCM-L) can provide solutions now. The rationale for expanded use is discussed. MCM-L represents the most logical substrate technology for use in the current and next-generation personal computers, workstations, and communication equipment. The bulk of these systems will not need the routing density of MCM-D View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • MCM prototyping using overlay interconnect process

    Publication Year: 1992 , Page(s): 36 - 39
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (268 KB)  

    The construction of complex multichip modules requires a means of evaluating the prototype for correct operation and characterization. A flexible prototype method is described, using the overlay interconnect approach, for probing and verification. The overlay process builds the interconnect over the top of a bare die. An overview of the process is given. The overlay interconnect method has several major areas of flexibility that can be used to facilitate the prototyping of MCMs. The ability to access pads, either on the first layer for die verification or on the top layer for control and observation, brings back part of the access for test that was lost in the size reduction. The ability to use the pads to test a partitioned design and then add the final interconnect layer allows current designs to make the transition more easily to the MCM format. Many of the advantages of using the overlay process for prototyping are outlined View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Design of a silicon-on-silicon multi-chip module for a high-performance Ps/2 workstation

    Publication Year: 1992 , Page(s): 110 - 113
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    A silicon-on-silicon multichip module design, which addresses several issues unique to low-end machines, is described. Among these are mixing bipolar and CMOS chips, practicing flip-chip and wirebonding on the same substrate, and customizing the power plane to supply multiple voltage levels. Following a description of the module design, the issue of performance in microprocessor-based machines as a driver for multichip module technology is discussed View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Die for MCMs: IC preparation for testing, analysis and assembly

    Publication Year: 1992 , Page(s): 32 - 35
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (364 KB)  

    A method of die preparation for test, analysis and burn-in is described that can begin to address multichip module (MCM) infrastructure requirements for obtaining known good die. The process developed provides full functional component testing, timing analysis at speed, and burn-in of ICs prior to MCM insertion. A soluble polymer overlay was coated on the die surface and patterned with new top level metal bond pads, allowing standard packaging, testing and burn-in while permitting a method of recovering selected devices for use in an MCM. The overlay formed a protective coating for the die and if left in place may be used to support assembly specific metallization patterns and various metal finish types. A demonstration of this technique is reported and the component quality and analysis effort is described View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Bare die testing and MCM probing techniques

    Publication Year: 1992 , Page(s): 20 - 23
    Cited by:  Papers (16)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (304 KB)  

    The author discusses two important issues regarding the development and manufacture of multichip modules (MCMs). First, a method is described which is used for testing bare chips at the full operating frequency and over temperature extremes. This approach utilizes a modified wafer probe system and a high-speed digital tester for at-speed performance characterization of individual chips prior to insertion into an MCM. The purpose is to fully assure that the device will perform as required once committed to the module. Second, a system is described for automated internal probing of functioning MCMs. Again, a standard wafer probe system is adapted for this purpose. This system permits characterization of fully populated MCMs View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.