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IEEE Micro

Issue 3 • Date May-June 2013

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Displaying Results 1 - 25 of 25
  • Front Cover

    Publication Year: 2013, Page(s): c1
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  • Table of Contents

    Publication Year: 2013, Page(s): c2
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  • Masthead

    Publication Year: 2013, Page(s): 1
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  • Ten Years of Top Picks

    Publication Year: 2013, Page(s): 2
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  • Call for papers

    Publication Year: 2013, Page(s): 3
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  • Top Picks from the 2012 Computer Architecture Conferences

    Publication Year: 2013, Page(s):4 - 7
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  • Designing for Responsiveness with Computational Sprinting

    Publication Year: 2013, Page(s):8 - 15
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (642 KB) | HTML iconHTML

    The tight thermal constraints of mobile devices, which limit sustainable performance, and the bursty nature of interactive mobile applications call for a new design focus: enhancing user responsiveness rather than sustained throughput. To that end, this article explores computational sprinting, wherein a mobile device temporarily exceeds sustainable thermal limits to provide a brief, intense burst... View full abstract»

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  • Neural Acceleration for General-Purpose Approximate Programs

    Publication Year: 2013, Page(s):16 - 27
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2245 KB) | HTML iconHTML

    This work proposes an approximate algorithmic transformation and a new class of accelerators, called neural processing units (NPUs). NPUs leverage the approximate algorithmic transformation that converts regions of code from a Von Neumann model to a neural model. NPUs achieve an average 2.3× speedup and 3.0× energy savings for general-purpose approximate programs. This new class of a... View full abstract»

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  • Scaling the Energy Proportionality Wall with KnightShift

    Publication Year: 2013, Page(s):28 - 37
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1257 KB) | HTML iconHTML

    Measuring energy proportionality accurately and understanding the reasons for disproportionality are critical first steps in designing future energy-efficient servers. This article presents two metrics-linear deviation and proportionality gap-that let system designers analyze and understand server energy consumption at various utilization levels. An analysis of published SPECpower results shows th... View full abstract»

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  • Hardware-Enforced Comprehensive Memory Safety

    Publication Year: 2013, Page(s):38 - 47
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB) | HTML iconHTML

    The lack of memory safety in languages such as C and C++ is a root source of exploitable security vulnerabilities. This article presents Watchdog, a hardware approach that eliminates such vulnerabilities by enforcing comprehensive memory safety. Inspired by prior software-only mechanisms, Watchdog maintains bounds and identifier metadata with pointers, propagates them on pointer operations, and ch... View full abstract»

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  • Inspection-Resistant Memory Architectures

    Publication Year: 2013, Page(s):48 - 56
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (674 KB) | HTML iconHTML

    The ability to safely keep a secret in memory is central to the vast majority of security schemes, but storing and erasing these secrets is a difficult problem in the face of an attacker who can obtain unrestricted physical access to the underlying hardware. Depending on the memory technology, the very act of storing a 1 instead of a 0 can have physical side effects measurable even after the power... View full abstract»

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  • Computing Now [Advertisement]

    Publication Year: 2013, Page(s): 57
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  • Relyzer: Application Resiliency Analyzer for Transient Faults

    Publication Year: 2013, Page(s):58 - 66
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (870 KB) | HTML iconHTML

    Future microprocessors need low-cost solutions for reliable operation in the presence of failure-prone devices. A promising approach is to detect hardware faults by deploying low-cost software-level symptom monitors. However, there remains a nonnegligible risk that several faults might escape these detectors to produce silent data corruptions (SDCs). Evaluating and bounding SDCs is, therefore, cru... View full abstract»

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  • Software [Advertisement]

    Publication Year: 2013, Page(s): 67
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  • A Quantitative, Experimental Approach to Measuring Processor Side-Channel Security

    Publication Year: 2013, Page(s):68 - 77
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1519 KB) | HTML iconHTML

    User inputs tend to change the execution characteristics of applications including their interactions with cache, network, storage, and other systems. Many attacks have exploited the observable side effects of these execution characteristics to expose sensitive information. In response, researchers have proposed countermeasures to protect against these attacks. However there is currently no system... View full abstract»

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  • Cache-Conscious Thread Scheduling for Massively Multithreaded Processors

    Publication Year: 2013, Page(s):78 - 85
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (671 KB) | HTML iconHTML

    Highly multithreaded architectures introduce another dimension to fine-grained hardware cache management. The order in which the system's threads issue instructions can significantly impact the access stream seen by the caching system. This article studies a set of economically important server applications and presents the cache-conscious wavefront scheduling (CCWS) hardware mechanism, which uses... View full abstract»

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  • Parallel Block Vectors: Collection, Analysis, and Uses

    Publication Year: 2013, Page(s):86 - 94
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (721 KB) | HTML iconHTML

    Parallel block vector profiles (PBVs) establish a mapping between a multithreaded application's basic blocks and the degree of parallelism the application exhibits each time a block executes. PBVs offer a new perspective that helps users both reason about parallel programs' hardware and software interactions and identify opportunities for performance improvements. Here, the authors present two PBV... View full abstract»

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  • Raise Your Standards [Advertisement]

    Publication Year: 2013, Page(s): 95
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  • A Safety-First Approach to Memory Models

    Publication Year: 2013, Page(s):96 - 104
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB) | HTML iconHTML

    Recent efforts to standardize concurrency semantics for programming languages require programmers to explicitly annotate all memory accesses that can participate in a data race ("unsafe" accesses). This requirement allows the compiler and hardware to aggressively optimize unannotated accesses, which are assumed to be data-race-free ("safe" accesses), while still preserving the intuitive thread int... View full abstract»

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  • IEEE Transactions on Emerging Topics in Computing [Call for papers]

    Publication Year: 2013, Page(s): 105
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  • Programmable DDRx Controllers

    Publication Year: 2013, Page(s):106 - 115
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (428 KB) | HTML iconHTML

    Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource constraints on system performance. A promising way of improving the versatility and efficiency of these controllers is to make them programmable. Unfortunately, the stringent latency and throughput requirements of modern... View full abstract»

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  • Unconscious Meaning [review of "A User's Guide to Thought and Meaning"; Jackendoff, R.; 2012)]

    Publication Year: 2013, Page(s):116 - 118
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  • Differentiated Platforms

    Publication Year: 2013, Page(s): 120
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  • Focus on Your Job Search [Advertisement]

    Publication Year: 2013, Page(s): c3
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  • Software Experts [Advertisement]

    Publication Year: 2013, Page(s): c4
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Aims & Scope

IEEE Micro addresses users and designers of microprocessors and microprocessor systems, including managers, engineers, consultants, educators, and students involved with computers and peripherals, components and subassemblies, communications, instrumentation and control equipment, and guidance systems.

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Meet Our Editors

Editor-in-Chief
Erik R. Altman
School of Electrical and Computer Engineering
IBM T.J. Watson Research Center