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Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

April 30 1995-May 3 1995

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  • Estimating key parameters in the EKV MOST model for analogue design and simulation

    Publication Year: 1995, Page(s):1588 - 1591 vol.3
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (485 KB)

    Recent availability of the public-domain EKV (Enz-Krummenacher-Vittoz) MOST model from EPFL in a number of circuit simulators facilitates the intuitive design, analysis and simulation of analogue and mixed-mode circuits and systems exploring the numerous modes of operation of the MOST, particularly at low-voltage (LV) and low-current (LC). A practical approach for either extracting the most critic... View full abstract»

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  • A unified approach to split structure adaptive filtering

    Publication Year: 1995, Page(s):1604 - 1607 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (397 KB)

    In this paper, a pragmatic approach to continuously split up an adaptive transversal filter is developed. It is shown that any M=2 L length adaptive filter can be decomposed into M parallel single-parameter sub-sections by an L-step splitting operation. The sub-sections can then be adapted separately and the convergence behaviour of the overall system is greatly improved. The proposed a... View full abstract»

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  • An adaptive neuro/fuzzy CMOS chip

    Publication Year: 1995
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (125 KB)

    Summary form only given. A modular chip, Tinychip in 2 micron CMOS process, contains a fuzzy-neuro system that is comprised of the usual fuzzification, inference, and defuzzification blocks. The circuit building blocks consist of single-transistors, differential pairs, transconductance multipliers, and bump circuits. The fuzzification and the defuzzification blocks each uses single-layer neural ma... View full abstract»

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  • Authors index

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (429 KB)
    Freely Available from IEEE
  • 1995 IEEE International Symposium on Circuits and Systems

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (2949 KB)
    Freely Available from IEEE
  • Design constraint on feedback gain vector of switching regulators for local stability

    Publication Year: 1995, Page(s):2334 - 2337 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    A discrete-time dynamic model of closed-loop switched mode electronic regulators is derived. No small-ripple approximations are required. The same model serves for both local and global stability study: by discarding the nonlinear terms (like products of small-signal perturbations in the converter state variables) and using the z-transform, a local stability criteria is formulated. Applying the co... View full abstract»

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  • Modeling the impact of 3-D-technology on the performance of the memory hierarchy of RISC systems

    Publication Year: 1995, Page(s):2305 - 2308 vol.3
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB)

    In this paper we investigate 3-D-technology for improving the performance of the memory hierarchy of RISC based systems from an architectural point of view. It is assumed that using 3-D-technology, not only the processor and the first-level cache can be integrated onto one IC, but processor, first-level, and second-level cache may be integrated onto one 3-D IC. In addition, the cache may be organi... View full abstract»

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  • Local approximation of stability boundary of a power system using the real normal form of vector fields

    Publication Year: 1995, Page(s):2330 - 2333 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    The objective of this work is to approximate the stability boundary of a power system without any integration using the normal form of the vector fields. This involves two steps: (1) first to test which unstable equilibrium point (UEP) lies on the stability boundary, and (2) the second step is to approximate the boundary by the second order approximated manifolds. The approximation is accomplished... View full abstract»

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  • System design using wave-pipelining: a CMOS VLSI vector unit

    Publication Year: 1995, Page(s):2301 - 2304 vol.3
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    Wave-pipelining, or maximum rate pipelining, is a circuit design technique which allows digital synchronous systems to be clocked at rates higher than can be achieved with conventional pipelining techniques by relying on the predictable finite delay through combinational logic for virtual data storage. Digital system design with ubiquitous use of wave-pipelining faces significant obstacles, includ... View full abstract»

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  • Merged CORDIC algorithm

    Publication Year: 1995, Page(s):1988 - 1991 vol.3
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    The COordinate Rotation DIgital Computer (CORDIC) algorithm is an iterative procedure to evaluate various elementary functions. It usually consists of one scaling multiplication and n+1 elementary shift-add iterations in an n bit processor. These iterations can be paired off to form double iterations to lower the hardware complexity while the computational complexity stays the same. With this stru... View full abstract»

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  • Generation of multi-polarity arithmetic transform from reduced representation of Boolean functions

    Publication Year: 1995, Page(s):2168 - 2171 vol.3
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    A new algorithm is given that converts a reduced representation of Boolean functions in the form of disjoint cubes to multi-polarity arithmetic spectrum. Since the known algorithms that generate arithmetic spectrum always start from the truth table of Boolean functions the method presented computes faster with a smaller required memory. The algorithm is extremely efficient for such Boolean functio... View full abstract»

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  • Optimal scheduling for conditional resource sharing

    Publication Year: 1995, Page(s):2297 - 2300 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (432 KB)

    A new approach is described for the datapath scheduling of behavioral descriptions containing nested conditional branches of arbitrary structures. This paper formulates a time-constrained scheduling problem as a 0-1 integer programming problem, in which each constraint is expressed in the form of a Boolean function, and a satisfiability problem is defined by the product of the Boolean functions. A... View full abstract»

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  • Learning in neuro/fuzzy analog chips

    Publication Year: 1995, Page(s):2325 - 2328 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    This paper focus on the design of adaptive mixed-signal fuzzy chips. These chips have parallel architecture and feature electrically-controllable surface maps. The design methodology is based on the use of composite transistors-modular and well suited for design automation. This methodology is supported by dedicated, hardware-compatible learning algorithms that combine weight-perturbation and outs... View full abstract»

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  • A new method of implementation of VLSI CORDIC for sine and cosine computation

    Publication Year: 1995, Page(s):1984 - 1987 vol.3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB)

    In this paper, a new CORDIC method for computing sine and cosine functions with a variable scalar factor is presented. The proposed new CORDIC algorithm will reduce the number of iterations to 6 maximum, with the accuracy of 16 bit length. This is accomplished by using signed two bits, instead of one to process at a time. In order to show the feasibility and the accuracy of the proposed new CORDIC... View full abstract»

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  • Multirate SC and SI filter system design by XFILT

    Publication Year: 1995, Page(s):2257 - 2260 vol.3
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    Strategies and algorithms for multirate SC and SI filter design are presented in this paper. By using analogue multirate signal processing techniques, much more efficient SI or SC circuit realisations can be obtained. The paper shows how multirate systems can be synthesized within the filter design system XFILT View full abstract»

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  • On the design of active GaAs multipliers

    Publication Year: 1995, Page(s):1872 - 1875 vol.3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    This paper is concerned with the design of high performance analogue multipliers using GaAs MESFET technology which use compact entirely active circuits and avoid the need for off-chip transformers or large on-chip baluns using coupled structures. A study by theory and simulation is made of various interface stages which drive the push-pull output FETs and some complete multipliers using various i... View full abstract»

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  • Fast transforms for orthogonal logic

    Publication Year: 1995, Page(s):2164 - 2167 vol.3
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB)

    The ways of generation of forward and inverse fast transforms for recently introduced orthogonal logic have been presented. The list of all fast transforms is thoroughly discussed. The paper summarizes those orthogonal transforms which have fast algorithms and easily defined recursive equations. In addition, those transforms which require one or more permutations to have fast transform are also di... View full abstract»

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  • A macromodel compaction scheme for the fast simulation of large linear mesh circuits

    Publication Year: 1995, Page(s):1836 - 1839 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    Analysis of large linear mesh circuits is critical in modern IC extraction and verification tools due to the complex 3-D effects associated with parasitic coupling through interconnects and the chip substrate. The limited availability of computer resources, however, is a major obstacle in the fast and accurate analysis of such circuits. This paper introduces a technique that divides the mesh into ... View full abstract»

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  • An integrated smart sensor for flow and temperature with I2 C bus interface: FTS2

    Publication Year: 1995, Page(s):2225 - 2228 vol.3
    Cited by:  Papers (5)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (420 KB)

    A fully integrated smart sensor for flow and temperature has been realized. The sensor is able to communicate with a simple microcontroller using an I2C serial data bus interface. The flow rate is obtained by determining the power needed to maintain a constant temperature difference above the flow temperature. The absolute temperature is measured using a bipolar PTAT circuit and a sigma... View full abstract»

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  • Sequential detection using a new recursive-averaging cumulant estimation method

    Publication Year: 1995, Page(s):2293 - 2296 vol.3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (260 KB)

    This paper proposes a new method to compute the third-order cumulants for a sequential data stream of arbitrary length. The new method is based on both the overlapping and recursive techniques to accommodate the missing correlations in the indirect method. The method is referred to as the Recursive-Averaging Cumulant Estimation (RACE). The new method has been used in signal detection problems and ... View full abstract»

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  • A CMOS PWL fuzzy membership function

    Publication Year: 1995, Page(s):2321 - 2324 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    The membership function, classically constructed from piecewise linear (PWL) functions, is one of the most important components in fuzzy neural systems. Here we give an improved current mode CMOS circuit suitable for design of fuzzy membership PWL functions. The circuit with bi-directional input is based upon an improved current mirror and is suitable for VLSI fabrication via the MOSIS CMOS proces... View full abstract»

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  • Novel circuit solutions for rail-to-rail CMOS buffer

    Publication Year: 1995, Page(s):1980 - 1983 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    The design of low-power rail-to-rail output buffers for high capacitive loads is critical. In particular, control of the output current, constant input transconductance and output stage driving must be well confined. In this paper we discuss the major design constraints and present a new topology for a CMOS rail-to-rail output buffer. The experimental results show that the proposed architecture is... View full abstract»

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  • A systematic approach for ladder based switched current filter design

    Publication Year: 1995, Page(s):2253 - 2256 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (300 KB)

    A systematic approach for ladder based switched-current (SI) filter design is described. Low sensitivity and low parameter spread SI circuits realised by both existing and novel structures can be derived from the proposed approach. The method can be applied to all the filter types and is well suited for computer aided implementation. Techniques to improve dynamic range and reduce circuit parameter... View full abstract»

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  • A CMOS preamplifier for electret microphones

    Publication Year: 1995, Page(s):1868 - 1871 vol.3
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    In this paper a CMOS preamplifier for capacitive sources is presented. The 20 dB gain preamplifier achieves a dynamic range of 54 dB while the total harmonic distortion is below -50 dB. Monte Carlo analyses have shown output random offset voltages below 40 mvolts. The power consumption of the proposed preamplifier is 24 μwatts. All this has been achieved due to the use of a novel resistor and l... View full abstract»

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  • A M-D FFT algorithm for symmetric signals

    Publication Year: 1995, Page(s):2160 - 2163 vol.3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (348 KB)

    Symmetric signals are defined by subsets of their support which depend on the specific symmetry. Depending on the symmetry, the cardinality of these subsets may be much smaller than that of the supports. The DFT of the symmetric signals enjoys symmetries related to the input symmetry, by which the DFT is defined by subsets the same as those defining the input signal. In principle, the computation ... View full abstract»

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