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Compcon Spring '92. Thirty-Seventh IEEE Computer Society International Conference, Digest of Papers.

Date 24-28 Feb. 1992

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Displaying Results 1 - 25 of 83
  • Digest of Papers. COMPCON Spring 1992. Thirty-Seventh IEEE Computer Society International Conference [Front Cover]

    Publication Year: 1992
    Save to Project icon | Request Permissions | PDF file iconPDF (207 KB)  
    Freely Available from IEEE
  • The software infrastructure for computer-supported collaboration

    Publication Year: 1992 , Page(s): 2 - 4
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (162 KB)  

    It is pointed out that, as personal computers move from their current role of personal productivity aids to enhancing the work of cooperating teams of individuals, technologies are developing that allow a richer style of communication and interaction. The integration of computer-generated graphics, compressed motion video and high-fidelity audio into network-distributed software systems promises t... View full abstract»

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  • System software for multimedia

    Publication Year: 1992 , Page(s): 5 - 11
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (279 KB)  

    The new system software for DVI technology called Audio Video Kernel (AVK) is described. This new software, developed jointly by Intel and IBM, along with hardware based on the Intel i750 video processor, adds digital multimedia data types to standard operating systems.<> View full abstract»

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  • Enabling rich data types in personal computers

    Publication Year: 1992 , Page(s): 12 - 14
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (202 KB)  

    Enhancements to personal computer hardware and software that enable application developers to use rich data types in applications are presented. The author notes that rich data types on personal computers are enabled by solving problems of performance, availability, and lack of standardization. Base-level performance must be improved so that the high-bandwidth requirements of motion video and stil... View full abstract»

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  • QuickTime: an extensible standard for digital multimedia

    Publication Year: 1992 , Page(s): 15 - 20
    Cited by:  Papers (1)  |  Patents (8)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (452 KB)  

    QuickTime is an extensible standard for digital multimedia which establishes a foundation for the representation of time-based objects and file formats, still image and video compression techniques, human interface conventions, and application programming interfaces. All of these representations can stay the same as one moves towards an era of full-screen, full-motion digital video/high-resolution... View full abstract»

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  • Broadband ISDN to support multimedia and collaborative applications

    Publication Year: 1992 , Page(s): 21 - 24
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (332 KB)  

    ATM, (asynchronous transfer mode) technologies, is the key underlying networking protocol for B-ISDN (broadband integrated services digital network). The author identifies the major advantages of ATM that make it suitable for supporting a very wide range of applications with diverse traffic characteristics and communications requirements that include bandwidth, delay constraints and error sensitiv... View full abstract»

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  • HyTime and MHEG

    Publication Year: 1992 , Page(s): 25 - 40
    Cited by:  Papers (2)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (911 KB)  

    A description is given of the history, technical orientation and status of the MHEG (Multimedia and Hypermedia Information Coding Experts Group) and HyTime projects. Their relationship to multimedia (e.g. MPEG) and document interchange (e.g. ODA and SGML) standards are also discussed. The relationship between the standards is explored, with emphasis on appropriate applications and situations where... View full abstract»

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  • Fractal video compression

    Publication Year: 1992 , Page(s): 41 - 42
    Cited by:  Papers (7)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (161 KB)  

    Techniques based on fractal geometry and the fractal transform yield a method for compressing video images which is independent of screen resolution and aspect ratio and provides incremental improvement over time for slowly varying images. It is (nearly) randomly accessible and transmission errors die out over time. Decompression with this system is extremely fast and, in fact, real-time decompres... View full abstract»

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  • PRISM's high resolution MPEG chip set

    Publication Year: 1992 , Page(s): 43 - 46
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (287 KB)  

    The MPEG/ISO 11172 decoder chipset is described. The PRISM decoder chipset is designed to meet the performance required for real-time applications for quality levels ranging from video cassette recorder quality to CCIR 601 quality digital video at data rates up to 10 Mb/s, resolution up to 720*480*30, and both 4:3 and 16:9 aspect ratios. In addition, the set-up is easily configurable for mid-low-e... View full abstract»

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  • A programmable solution for standard video compression

    Publication Year: 1992 , Page(s): 47 - 50
    Cited by:  Papers (1)  |  Patents (30)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (282 KB)  

    The emergence of the CCITT H.261, MPEG, and IPEG video compression standards has created the need for hardware capable of executing all of these standards. It is pointed out that the Integrated Information Technology (IIT) Vision Processor (VP) and Vision Controller (VC) chips provide a flexible, programmable solution capable of executing H.261, MPEG and JPEG. The VP is the first programmable vide... View full abstract»

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  • Media composition for casual users

    Publication Year: 1992 , Page(s): 52 - 57
    Cited by:  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (417 KB)  

    An application, called Movie-Recorder has interface elements which are designed to simplify two core activities of media composition: the capture of digital movies from analog devices and, the control and editing of the captured movies. MovieRecorder has been developed for digitizing Quicktime movies from 'live' or 'uncontrolled' sources, i.e. VCRs or cameras whose video frames cannot be accuratel... View full abstract»

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  • Building network-based interactive media

    Publication Year: 1992 , Page(s): 58 - 63
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (530 KB)  

    It is pointed out that the design of a network-based interactive multimedia application depends on the characteristics of the network, the modes of user interaction and the media types that will be used. Careful selection of these elements in the design process is needed to create successful applications. The characteristics of network-based interactive media applications interact to provide vario... View full abstract»

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  • Fusion of digital image processing and video on the desktop

    Publication Year: 1992 , Page(s): 64 - 67
    Cited by:  Patents (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (322 KB)  

    The use of digital image processing techniques to create compelling multimedia and video using VideoFusion, a Macintosh application for processing QuickTime movies is described. VideoFusion provides a toolbox for video processing, including a wide variety of video editing techniques, compositing, chroma keying, special effects and 3D transforms.<> View full abstract»

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  • A comparison of hierarchical high definition imagery coding schemes

    Publication Year: 1992 , Page(s): 68 - 75
    Cited by:  Patents (37)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (505 KB)  

    Various methods of constructing a compression hierarchy and a spatial and temporal resolution hierarchy are noted. The most suitable of these techniques seems to be a hybrid of current motion compensated DCT (discrete cosine transform) and subband coding schemes which are modified to accommodate a compression quality level hierarchy. In addition, an optional correction residual can be added to bot... View full abstract»

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  • Networking digital video

    Publication Year: 1992 , Page(s): 76 - 83
    Cited by:  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (508 KB)  

    Fluent Machines Inc., has developed Fluency, a system architecture for digital video consisting of FluentStreams system software, FluentLinks network software and the VSA-1000 digital video system hardware. The author presents the technical challenges inherent in networking digital video, and describes how Fluent's system architecture is designed to meet these requirements.<> View full abstract»

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  • Multimedia communications on the NYNEX Shuttle

    Publication Year: 1992 , Page(s): 84 - 87
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (238 KB)  

    The NYNEX Shuttle is a research and development testbed for prototyping concepts for public switched network based multimedia communication services with special emphasis on video services. The Shuttle provides services to employees of NYNEX who need to communicate between its two laboratories in Cambridge, MA and White Plains, NY, by utilizing mixed-media telecommunications facilities and prototy... View full abstract»

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  • Client-server challenges for digital video

    Publication Year: 1992 , Page(s): 88 - 91
    Cited by:  Papers (3)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (312 KB)  

    The various challenges faced in delivering interactive digital video services to desktop computers in local area environments are discussed. Similar to well-known data applications, most video applications of interest involve sharing digital video information stored in a server through a local area network. Given the unique requirements of video services (large volumes of data, continuous-stream n... View full abstract»

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  • Is SIMD enough for scientific and engineering applications on massively parallel computers?

    Publication Year: 1992 , Page(s): 95 - 102
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (709 KB)  

    Some basic issues involved in matching an application to a distributed memory parallel machine are addressed. In particular, data communication and processor synchronization as they relate to MIMD (multiple instruction-multiple data) and SIMD (single-instruction-multiple data) architectures are discussed. To illustrate the differences, the authors describe the implementation and performance of sev... View full abstract»

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  • Lessons for massively parallel applications on message passing computers

    Publication Year: 1992 , Page(s): 103 - 114
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (486 KB)  

    A decade's work on message passing MIMD (multiple instruction-multiple data) parallel computers in the areas of hardware, software, and applications is reviewed. The author concludes that distributed memory parallel computing works, and he describes the implications of this for future portable software systems. He claims that the message passing model was and will continue to be very successful. T... View full abstract»

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  • A high speed superscalar PA-RISC processor

    Publication Year: 1992 , Page(s): 116 - 121
    Cited by:  Papers (18)  |  Patents (19)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (436 KB)  

    A novel processor implementing Hewlett-Packard's PA-RISC 1.1 (precision architecture-reduced instruction set computer) has been designed. A single chip implemented in a 0.8- mu m three-level metal CMOS technology includes the integer processor and a floating point coprocessor. The design operates at 100 MHz and is the first superscalar PA-RISC design. The processor cache is a large configurable me... View full abstract»

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  • Scalable graphics enhancements for PA-RISC workstations

    Publication Year: 1992 , Page(s): 122 - 128
    Cited by:  Papers (12)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (472 KB)  

    The addition of graphics-specific features to the series 700 system architecture has improved graphics performance by 33% to 100% across various graphics workloads relative to the base system architecture. The model 730, which incorporates a 76 SPECmark PA-RISC (reduced instruction set computer) CPU, is capable of rendering over 1,000,000 3D vectors/s and 19400 independently shaded, z-buffered qua... View full abstract»

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  • Pathlength reduction features in the PA-RISC architecture

    Publication Year: 1992 , Page(s): 129 - 135
    Cited by:  Papers (10)  |  Patents (21)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (605 KB)  

    A description is given of representative pathlength reduction features of PA-RISC (reduced instruction set computer) instructions in memory accessing, functional operations, and instruction sequencing. To illustrate the multi-op instructions in PA-RISC, comparison is made with the MIPS instruction set, rather than with some hypothetical single-op RISC instructions. It is noted that, while other RI... View full abstract»

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  • The SuperSPARC microprocessor

    Publication Year: 1992 , Page(s): 136 - 141
    Cited by:  Papers (17)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (395 KB)  

    The SuperSPARC microprocessor is a highly integrated, high-performance superscalar SPARC version 8 compatible microprocessor. The authors provide an overview of its internal operation and capabilities. The processor contains an integer unit, a double precision floating point unit, fully consistent instruction and data caches, a SPARC reference memory management unit and a dual-mode bus interface s... View full abstract»

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  • A second-level cache controller for a super-scalar SPARC processor

    Publication Year: 1992 , Page(s): 142 - 151
    Cited by:  Papers (2)  |  Patents (12)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (710 KB)  

    The design of a BiCMOS 50-MHz, 2.2-million transistor, second-level cache controller chip (CC) for a SPARC super-scalar CPU (PU) is described. This chip is designed to control up to 2 MB of second-level cache (E$) so that the effective memory latency is reduced, and to support two different multiprocessor (MP) system buses, the MBus and the Dynabus. CC isolates PU and E$, which operate with a fast... View full abstract»

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  • Pinnacle-1: the next generation SPARC processor

    Publication Year: 1992 , Page(s): 152 - 156
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (287 KB)  

    The Pinnacle-1 second-generation SPARCore module is described. This module has been designed to provide high-performance and low-cost systems. An architectural overview of the Pinnacle-1 SPARCore module is presented. It is noted that the Pinnacle-1 SPARCore module provides an elegant solution for easy upgradability from the current generation systems along with enhanced performance through the MIL... View full abstract»

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