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Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on

Date 6-10 Nov. 1995

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  • 1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings

    Publication Year: 1995
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    Freely Available from IEEE
  • Authors index

    Publication Year: 1995
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    Freely Available from IEEE
  • High-performance microprocessor packaging in the year 2000: technical and economic barriers and alternatives

    Publication Year: 1995 , Page(s): 234 - 237
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    By the year 2000, computers capable of >1000 MIPs and operating at >500 MHz are on the horizon. As the microprocessor becomes more powerful, major technical and economic challenges in packaging technologies are evident. In this paper, we trace the emergence of the microprocessor by examining the technical and economical drivers. It is seen that specialized material processes and designs are required to package a high-performance microprocessor. Low-cost materials with low dielectric constant and high electrical and thermal conductivity metallization are required to meet these objectives. As microprocessor architectures migrate towards closely-coupled CPU/cache requiring more than one VLSI, the multichip module is emerging/re-emerging as a requirement View full abstract»

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  • An asynchronous matrix multiplier

    Publication Year: 1995 , Page(s): 315 - 318
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    The paper describes an asynchronous matrix multiplier. A simple and efficient micropipeline structure is applied. With a voltage-controlled delay and basic handshaking control protocol, the multiplier is guaranteed to be hazard free. Also, its performance can be adjusted after fabrication View full abstract»

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  • Logic design for low-power CMOS circuits

    Publication Year: 1995 , Page(s): 299 - 302
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    This paper presents the design of low-voltage and low-power CMOS circuits. It is based on a branch-based logic style that provides many benefits. Branch-based logic is presented and compared to other logic styles. Race-free flip-flops as well as complex gate decomposition are introduced and discussed from the low-voltage/low-power point of view. The advantages of branch modelization compared to cell modelization are presented. Logic parallelization used for some basic cell and logic modules such as shift registers is presented View full abstract»

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  • A full digital self-timed clock generation scheme

    Publication Year: 1995 , Page(s): 319 - 322
    Cited by:  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (388 KB)  

    A full digital self-timed clock generation scheme is developed, where multiple internal clocks are self-generated for each external request. The internal clock period is designed to be the critical path delay of the internal system at all operating environments. This scheme can be applied to time-multiplexed implementations, self-timed operation, and low-power applications View full abstract»

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  • Electrochemical planarization by selective electroplating for embedded gold wiring in the sub-micron range

    Publication Year: 1995 , Page(s): 287 - 290
    Cited by:  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (508 KB)  

    A planar Au metallization process by electrolytic plating has been developed for metal interconnections in the submicron range. Gold wires with high aspect ratio were fabricated in an embedded structure within the dielectric spacer. By etching of Au and oxidizing the surface of TiW in the field, the gold wires can be selectively formed within the dielectric. This process can provide desired properties of conductor structures for Si LSI applications View full abstract»

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  • Selectivity enhancement of tin dioxide gas sensor with polymer membrane

    Publication Year: 1995 , Page(s): 179 - 182
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (252 KB)  

    The application of a polymer to enhance the selectivity of a tin dioxide gas sensor is presented. Commercial polymer, XU218 of Ciba-Geigy company, is coated on the sensing film of a tin dioxide gas sensor FIGARO TGS842 which was designed to detect methane. The polymer coated sensor is calibrated in a high accuracy testing chamber that is controlled by PC with GPIB and mass flow controllers (MFCs). Three gases, hydrogen, methane, and ammonia, are used to investigate the response of the sensor. It is found that the sensor shows a characteristic change in response to ammonia and almost negligible change in response to hydrogen and methane View full abstract»

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  • Simulation of Ge implanted SiGe-channel p-MOSFETs

    Publication Year: 1995 , Page(s): 412 - 415
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    This paper describes the process feasibility analysis and numerical simulation of Ge implanted SiGe-channel p-MOSFETs. The average separation between conducting holes and SiO2-Si interface peaks at certain effective implantation range, implies an optimum mask thickness. Threshold voltage is shown to increase with increasing Ge dose and decreasing effective projected range View full abstract»

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  • A high-speed clock distributing system using guarded transmission lines

    Publication Year: 1995 , Page(s): 323 - 326
    Cited by:  Patents (1)
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    A new clocking system is proposed in which the clock is transmitted as almost complete standing wave along a guarded transmission line. The line and the guard are driven with signals of almost the same shape. Simulation shows that the skew is reduced to 1/50 in bipolar and 1/20 in CMOS circuits View full abstract»

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  • A new type MOS-gated tunnel transistor with a Schottky barrier

    Publication Year: 1995 , Page(s): 387 - 390
    Cited by:  Patents (2)
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    A new type tunnel transistor, in which electrons can tunnel through the Schottky barrier between the Schottky metal and the accumulation layer formed at the interface by a MOS gate just on the Schottky junction to control the tunneling current, is proposed and demonstrated View full abstract»

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  • Two-stage fast focus method for mask registration

    Publication Year: 1995 , Page(s): 295 - 298
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    For mask registration, we require matching between masks to be fast and reliable. By using coarse/fine search, the process can be speeded up but reach a point where the search speed is maximised while the process is still reliable. A two-stage probability based fast focus search strategy is proposed for mask matching in binary or grey scale images to further increase the search step while maintaining reliability of the process View full abstract»

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  • Reed-Muller versus traditional Boolean circuit implementation

    Publication Year: 1995 , Page(s): 175 - 178
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    Digital circuits realized from Reed-Muller (RM) algebraic descriptions are generally less complex than those realized from conventional Boolean methods. This suggests that the technique will be better suited for VLSI or ASIC (application specific integrated circuit) implementations because of the reduction in chip size and increased optimization options. In particular, digital circuits realized from RM universal logic modules (RM-ULMs) have a very simple structure and will incur less propagation delay. The paper presents design examples to illustrate the advantages of RM-based circuits and analyzes the results obtained View full abstract»

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  • Development of a novel micro FIA-ISFET integrated sensor

    Publication Year: 1995 , Page(s): 183 - 186
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    Based on the principle of flow injection analysis (FIA), this paper reports a novel micro FIA-ISFET integrated sensor. Four pairs of long-arm pH-ISFET/REFET units and symmetric Ti/Au film pseudo-reference electrodes are integrated on the chip, so that an integrated configuration of transducer and micro flow-through cell is achieved. The chip size of the sensor is 6*8mm2. Initial experimental results indicate that the liquid can be measured driven by peristaltic pump flows with great fluency and that the amount of test sample needed in dynamic measurement is greatly reduced. The integrated sensor has quick response and its reliability and stability are considerably improved View full abstract»

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  • Analog and VLSI implementation of connectionist network for minimum spanning tree problems

    Publication Year: 1995 , Page(s): 137 - 140
    Cited by:  Papers (2)
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    We describe a connectionist architecture which shows promise in obtaining the global optimal solution to the classical minimum spanning tree problem in a time independent of the problem size. Using commonly available analogue electronic components, a network prototype was found to give the global optimal solution within the microseconds range. Simulation results and limiting factors of the performance of analog and VLSI implementation circuits are discussed View full abstract»

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  • An improved circuit for high performance dc-dc/ac converters

    Publication Year: 1995 , Page(s): 327 - 330
    Cited by:  Papers (3)
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    Switched-capacitor DC-to-DC converters can be improved by voltage-tracking-control (VTC) regulation to get high performance. The new type of converter overcomes the drawbacks, such as small ratio of conversion, high sensitivity to parameters of the circuit elements, difficult to control output ripple, etc., which usually exist in conventional switched-capacitor converters. The new approach presented here can also realize DC-to-AC conversion without any substantial change in the circuit View full abstract»

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  • Impurity induced disordering produced lateral optical confinement in AlGaAs and InGaAs (on GaAs) quantum well waveguides

    Publication Year: 1995 , Page(s): 85 - 88
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    The impurity induced disordering technique is employed on an AlGaAs/GaAs quantum well optical waveguide to provide lateral optical confinement. The modal propagation constant and field profile are analysed using an improved Fourier decomposition method. The single mode operating region is given in terms of thickness of quantum well layers View full abstract»

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  • Fabrication of gated wedge-shaped field emitter array by plasma etching and gold plating

    Publication Year: 1995 , Page(s): 191 - 194
    Cited by:  Patents (1)
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    A gated wedge-shaped field emitter has been fabricated by anisotropic etching and gold plating. The structure displays high emitter aspect ratio, sharp emitter tip and small gate-to-tip distance which are crucial in lowering the threshold voltage and increasing the emission efficiency of the device. The process is fairly simple with high processing latitude, and is, therefore, suitable for applications such as flat panel displays and ultra-high frequency devices View full abstract»

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  • Luminescent porous polycrystalline silicon film

    Publication Year: 1995 , Page(s): 67 - 70
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    This paper will present new growth mechanisms, nanostructures and photoluminescence results on porous polycrystalline silicon films. The possible explanations and models will also be proposed and discussed View full abstract»

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  • A CMOS technology roadmap for the next fifteen years

    Publication Year: 1995 , Page(s): 1 - 4
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    A technology roadmap for semiconductors, which forecasts CMOS technology for the next 15 years, was published recently by the SIA in the USA. A major goal of the roadmap is to provide a guide that can be used for R&D investment decisions and selection of roles by R&D organizations. The roadmap development process, the principal technology characteristics, as well as the key assumptions and major technical issues are discussed. Areas of focused development will include scaling with power supply voltage reduction, power dissipation reduction, transient-current reduction, and SOI CMOS technology View full abstract»

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  • A new CMOS analog multiplier with improved input linearity

    Publication Year: 1995 , Page(s): 135 - 136
    Cited by:  Papers (2)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (136 KB)  

    A new CMOS four-quadrant analog multiplier is presented. By means of an unique nonlinear compensation technique, the linear input range of the multiplier is extended significantly. The simulation results show that, when Vy=±3V, the nonlinear error is less than 0.94% over the ±3V input range of Vx and when Vx =±3V, the nonlinear error is less than 0.25% over the ±3V input range of Vy, with a power supply of ±5V View full abstract»

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  • GaAs tri-step high-low doping channel field effect transistor

    Publication Year: 1995 , Page(s): 107 - 110
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    A fabricated camel-gate FET with a tri-step doping channel exhibits a large drain current density of >750 mA/mm. Furthermore, the relatively voltage-independent transconductance is as high as 220 mS/mm and the applied gate voltage is of up to +1.5 V. A 1.5×100 μm2 gate dimension device was found to have a fT of about 30 GHz with very low input capacitance View full abstract»

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  • Vertical-cavity surface-emitting semiconductor lasers with diffused quantum wells

    Publication Year: 1995 , Page(s): 93 - 94
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (172 KB)  

    A self-consistent dynamic model is developed including the current distribution, carrier diffusion rate and spatial hole burning effects to investigate the modulation response of vertical-cavity surface-emitting lasers with diffused quantum wells structure. It is found that the overall performance including relaxation oscillation frequency and modulation bandwidth is improved View full abstract»

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  • ZnSe blue LED with nitrogen-doped ZnSe grown in a Se-rich condition by low-pressure OMCVD

    Publication Year: 1995 , Page(s): 73 - 76
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    Pure-blue emission of the as-grown ZnSe diode at 300 K was observed. The EL spectrum was dominated by a band-to-band emission peak at 2.68 eV with a half-width 52 meV. The results were consistent with that of the photoluminescence spectrum. These indicated that high-quality ZnSe blue LEDs were obtained under the developed growth condition View full abstract»

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  • Fabrication and its response characteristics of MELO accelerometer

    Publication Year: 1995 , Page(s): 32 - 35
    Cited by:  Papers (1)
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    This paper reports on the fabrication and experimental results of a novel piezoresistive bridge-type accelerometer utilizing merged epitaxial lateral overgrowth (MELO) of silicon. The suspension beams of a bridge type accelerometer were realized by selective epitaxial lateral overgrowth of silicon resulting in a local silicon-on-insulator (SOI) structure, resulting in high quality low-doped single crystal epitaxial silicon. Its sensitivity was 0.287 mV/V-g, resonant frequency was 2.026 kHz, and the linearity was excellent up to 30 g View full abstract»

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