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Proceedings International Phoenix Conference on Computers and Communications

28-31 March 1995

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Displaying Results 1 - 25 of 110
  • Internetworking with ATM and legacy LAN networks

    Publication Year: 1995
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (25 KB)

    Summary form only given. To be truly successful, ATM network islands need to interoperate with today's LANs and WANs. In this talk we will examine alternatives for attaching routers and bridges to an ATM network as well as the issues associated with internetworking ATM networks with WAN network types such as SMDS and Frame Relay.<> View full abstract»

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  • Proceedings International Phoenix Conference on Computers and Communications

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (30 KB)
    Freely Available from IEEE
  • A quadratic-time heuristic method for reliable network design with arbitrary traffic loads

    Publication Year: 1995, Page(s):233 - 240
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB)

    The goal of a reliable network is to ensure that all transmitted messages arrive at their intended destinations uncorrupted. Most network design techniques concern themselves with channel capacity allocation and cost constraints and ignore reliability analysis. Conversely, network reliability analysis methods focus on connectivity and ignore traffic loads and channel capacities. This paper present... View full abstract»

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  • A framework for optimal communication on a subclass of the Cayley graph based networks

    Publication Year: 1995, Page(s):241 - 248
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (620 KB)

    We develop a special framework on a number of networks that exhibit some specific characteristics and belong to a subclass of the Cayley graph based networks. Subsequently, we show how this framework can be used to develop a spanning graph, denoted by BSG, that possess some special properties. This spanning graph constitutes the basic tool for the development of algorithms for three fundamental co... View full abstract»

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  • Migrating controller based framework for mutual exclusion in distributed systems

    Publication Year: 1995, Page(s):1 - 7
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (572 KB)

    A new framework for migrating controller based distributed mutual exclusion algorithms is presented. A salient feature of the proposed framework is the separation of two orthogonal aspects of the problem, viz., migrating controller and the granting of critical section entry. Two new algorithms are presented to illustrate the derivation of specific algorithms from the generalized framework View full abstract»

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  • Ascend/descend algorithms on Cayley graphs

    Publication Year: 1995, Page(s):249 - 255
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    In a fundamental paper, F.P. Preparata and J.E. Vuillemin (1981) introduced the cube connected cycles graph and demonstrated a congestion free implementation of an ascend/descend algorithm. Subsequently, it was shown that the cube connected cycles graph is the Cayley graph of a group, the wreath product. We isolate the properties required of a Cayley graph that enable a congestion free implementat... View full abstract»

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  • A self-stabilizing algorithm for the maximum flow problem

    Publication Year: 1995, Page(s):8 - 14
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (628 KB)

    The maximum flow problem is a fundamental problem in graph theory and combinatorial optimization with a variety of important applications. Known distributed algorithms for this problem do not tolerate faults or adjust to dynamic changes in network topology. This paper presents the first distributed self-stabilizing algorithm for the maximum flow problem. Starting from an arbitrary state, the algor... View full abstract»

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  • Establishing PCI compliance using formal verification: a case study

    Publication Year: 1995, Page(s):373 - 377
    Cited by:  Papers (3)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (316 KB)

    This paper presents a case study in the practical application of formal verification. Specifically, we describe our experience in applying the formal verification technique of symbolic model checking to the verification of PCI bus bridges. During the last 2 years, we have used symbolic model checking to verify more than 12 hardware designs, including a number of PCI bus bridges. This use of formal... View full abstract»

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  • Shortest path routing in a class of Cayley graphs of semi-direct product of finite groups

    Publication Year: 1995, Page(s):256 - 262
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (536 KB)

    Recently R.N. Draper (1990) initiated the study of interconnection networks based on Cayley graphs of semi-direct products of two cyclic groups called supertoroids graphs. Interest in this class of graphs stems from their relatively smaller diameter compared to toroids of the same size. In this paper we described a deterministic, distributed, shortest path algorithm for routing in this class of ne... View full abstract»

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  • Accuracy of filtered traces

    Publication Year: 1995, Page(s):82 - 86
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    Reducing the size of large address traces by “filtering” them through a small direct-mapped cache is a useful technique for making more efficient use of both secondary storage and processors used for trace-driven simulation. However, when filtered traces are used to drive cache simulators, the distortion introduced by such filtering can produce substantial errors in the miss ratios obt... View full abstract»

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  • Load balancing strategy and priority of tasks in distributed environments

    Publication Year: 1995, Page(s):15 - 22
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (544 KB)

    After showing that lower bound is not the only important parameter to balance subproblems between queues of best-first B&B distributed algorithms, we introduce another notion of priority between subproblems that takes into account not only their lower bound but also their capacity to generate other subproblems. We developed three load balancing strategies using this new notion of priority, wit... View full abstract»

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  • Asynchronous transfer mode in broadband networks

    Publication Year: 1995, Page(s):558 - 564
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB)

    Asynchronous transfer mode (ATM) is the emerging technology of choice for broadband transmission and services in private and public networks. This article provides a primer on ATM, focusing primarily on the ATM layer View full abstract»

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  • Formal verification of a commercial serial bus interface

    Publication Year: 1995, Page(s):378 - 382
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    A new technique for the analysis of sequential hardware designs is illustrated on a serial bus interface. A set of experiments using models of the bus interface and temporal logic formulae is discussed View full abstract»

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  • Techniques for accelerated measurement of low bit error rates in computer data links

    Publication Year: 1995, Page(s):184 - 190
    Cited by:  Papers (8)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (456 KB)

    We present techniques for the rapid estimation of very low (10-12 to 10-20) bit-error-rate (BER) in electrical and optical digital data links. Approximately 2 minutes elapsed time is required to perform a low BER test, independent of the actual BER value being measured. There are two types of applications: (1) confirming very low BER (<10-12) performance, and (2... View full abstract»

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  • Two different families of fixed degree regular Cayley networks

    Publication Year: 1995, Page(s):263 - 269
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (488 KB)

    Regular Cayley graphs like hypercubes and recently introduced star graphs play an important role in designing interconnection networks for multiprocessing systems; these graphs are regular and the degree of the nodes increases with the size of the graph (the number of nodes) either logarithmically or sub logarithmically. But, from a VLSI design point of view, constant degree networks are more suit... View full abstract»

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  • Supporting dynamic reconfiguration of operating system using object and meta objects

    Publication Year: 1995, Page(s):727 - 733
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (616 KB)

    In this paper, we present the architecture of an operating system kernel that provides efficient reconfiguration mechanism for itself and the applications. In the presented kernel, the reconfiguration process is realized either by the reconfiguration of the environment or by the reconfiguration of the contents of an object. The former is provided by the reflective management architecture of object... View full abstract»

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  • Trace sampling for design trade-offs of microprocessors using SPEC Integer benchmarks

    Publication Year: 1995, Page(s):87 - 94
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    Trace-driven simulation has been used by a large number of design groups to study the performance of computer systems. This approach suffers from the high cost of trace generation and trace execution. Trace sampling techniques have been used for the study of cache memory systems as well as superscalar microprocessors. In spite of the desired features of sampled traces for studying cache behavior, ... View full abstract»

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  • A novel technique for fast multiplication

    Publication Year: 1995, Page(s):109 - 114
    Cited by:  Papers (2)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (372 KB)

    In this paper we present the design of a new high speed multiplication unit. The design is based on non-overlapped scanning of 3-bit fields of the multiplier. In this algorithm the partial products of the multiplicand and three bits of the multiplier are pre-calculated using only hardwired shifts. These partial products are then added using a tree of carry-save-adders, and finally the sum and carr... View full abstract»

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  • Matching algorithms with parallel architectures: a quantitative approach

    Publication Year: 1995, Page(s):430 - 436
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB)

    The purpose of this paper is to assess the match between algorithms and MIMD parallel architectures from the perspective of resource requirements and resource supplies. In the Extended Evaluation Framework, three figures of merit (FOM1, FOM2 and FOM3) are proposed as measures of the match. FOM1 shows the time average of the sum of weighted resource to re... View full abstract»

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  • Effect of faulty network components on node availability

    Publication Year: 1995, Page(s):128 - 135
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (720 KB)

    Failure of network hardware components in parallel systems results in deterioration of the communication support provided to various nodes. Limited communication capability may result in the unavailability of one or more nodes to users. In this paper, we develop a framework to study the effect of faulty network components on node availability. We use the framework to investigate the specific case ... View full abstract»

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  • On the performance of a DS/SS system in a band-limited multipath environment

    Publication Year: 1995, Page(s):622 - 628
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    Direct sequence spread spectrum systems for band limited multipath channels are considered. The trade off between processing gain and intersymbol interference with various fixed bandwidths is investigated. Two chip waveforms, rectangular and raised cosine, are examined for both deterministic and random spreading sequences. The performance measure of interest is signal to interference ratio (SIR). ... View full abstract»

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  • A self-stabilizing ranking algorithm for tree structured networks

    Publication Year: 1995, Page(s):23 - 28
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (412 KB)

    This paper presents a self-stabilizing algorithm for ranking a group of processors connected in a distributed system. The protocol suggested is resilient to transient failures, and is guaranteed to recover in finite time. This resiliency is achieved through self-stabilization which guarantees convergence to the desired behavior within finite time. This protocol has application in leader election, ... View full abstract»

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  • MPCBN: a high performance ATM switch

    Publication Year: 1995, Page(s):585 - 591
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB)

    It has been recognized that the main bottleneck of ATM networks is the switch itself. We propose using a multiple partitionable circular bus network (MPCBN) as an ATM switch. To achieve parallel execution of cell transfer requests, we use a graph coloring algorithm for conflict resolution. An approach of using finite projective places is then used to reduce the number of switch points from O(N View full abstract»

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  • Architectural and multiprocessor design verification of the PowerPC 604 data cache

    Publication Year: 1995, Page(s):383 - 388
    Cited by:  Papers (2)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (500 KB)

    The PowerPC 604 microprocessor has high performance 32-bit implementation, which is optimized to produce compact code while adhering to RISC philosophy. The PowerPC 604 microprocessor can sustain a maximum issue rate of 4 instructions per cycle. The data cache of the 604 is a 16 KB four-way set-associative non-blocking cache which contains MESI states (M: Modified, E: Exclusive-unmodified, S: Shar... View full abstract»

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  • On non-existence of optimal local synchronous bandwidth allocation schemes for the timed-token MAC protocol

    Publication Year: 1995, Page(s):191 - 197
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (572 KB)

    Numerous methods have been proposed to integrate real-time and non-real-time services of the timed-token medium access control (MAC) protocol. One of the key issues in tailoring the timed-token protocol for real-time applications is the synchronous bandwidth allocation (SBA) problem whose objective is to meet both the protocol and deadline constraints. Several non-optimal local SBA schemes and two... View full abstract»

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