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Computers and Communications, 1995., Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix Conference on

Date 28-31 March 1995

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Displaying Results 1 - 25 of 110
  • Proceedings International Phoenix Conference on Computers and Communications

    Publication Year: 1995
    Request permission for commercial reuse | PDF file iconPDF (30 KB)
    Freely Available from IEEE
  • NView: a visual framework for network tool integration

    Publication Year: 1995, Page(s):283 - 289
    Cited by:  Papers (1)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (728 KB)

    Monitoring and managing distributed applications and networks present a number of problems. Tracking down the source of connection problems over a large area, such as the Internet, can be time-consuming and confusing, as one must deal with many small utilities. In this paper, we present NView a framework program for integrating network tools into a uniform visual interface with a minimum of effort... View full abstract»

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  • Parallel task execution in LANs and performance analysis

    Publication Year: 1995, Page(s):423 - 429
    Cited by:  Patents (31)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    This paper analyzes the performance of local area networks (LANs) of workstations for distributed computing. Application programs are scheduled by the user workstation (master) for parallel execution in the idle or lightly loaded processors (slaves). Partial results are collected by the master station to synchronize the operation of slave nodes. A general speedup equation is derived to verify the ... View full abstract»

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  • Two-way balance-tolerant partitioning based on fuzzy graph clustering for hierarchical design of VLSI systems

    Publication Year: 1995, Page(s):416 - 422
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (608 KB)

    In this paper, first, we model a two-way balance-tolerant partitioning for a VLSI circuit. Furthermore, we propose an efficient approach based on one kind of fuzzy graph clustering, probabilistic graph clustering, to obtain a two-way balance-tolerant partitioning of VLSI circuits. In this approach, a circuit netlist is represented as an edge-weighted undirected graph by transforming a hypergraph w... View full abstract»

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  • Performance analysis of a dual bus reservation based fiber-optic network

    Publication Year: 1995, Page(s):479 - 486
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (640 KB)

    In this paper, we present the performance of a dual bus reservation based (DBRB) access protocol, for high speed local and metropolitan area networks. The DBRB network consists of unidirectional dual bus topology of fiber optic cables. At each end there is a master station which generates a frame of slots. When a station wants to transmit, it has to make a reservation in a frame on one bus and wai... View full abstract»

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  • Distributed programming in more efficient remote shell environment with direct data forwarding and lazy connection release

    Publication Year: 1995, Page(s):720 - 726
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (508 KB)

    In this paper, we propose a distributed programming tool working in a form of programming in the large. We developed an enhanced remote shell, named `Ersh'. Ersh works in two modes, simple mode and distributed programming mode. Simple mode provides similar environment to rsh. For the case of distributed programming mode, Ersh adopts a direct data forwarding, a lazy connection release and an asynch... View full abstract»

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  • Conceptual modeling: a critical survey and a few perspectives

    Publication Year: 1995, Page(s):319 - 325
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (676 KB)

    The ANSI/X3/SPARC architecture is a basic component of the database technology. Conceptual modeling is a major element of database design. After twenty years of use a contrasted evaluation can be done. Formalisms, design techniques and mappings represent very different interpretations of the proposed architecture. Most of the time, naturalness and intuition are the guidelines for an easy conceptua... View full abstract»

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  • Establishing PCI compliance using formal verification: a case study

    Publication Year: 1995, Page(s):373 - 377
    Cited by:  Papers (3)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (316 KB)

    This paper presents a case study in the practical application of formal verification. Specifically, we describe our experience in applying the formal verification technique of symbolic model checking to the verification of PCI bus bridges. During the last 2 years, we have used symbolic model checking to verify more than 12 hardware designs, including a number of PCI bus bridges. This use of formal... View full abstract»

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  • Experiences with high-level parallel programming systems

    Publication Year: 1995, Page(s):472 - 478
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (668 KB)

    A programmer developing software for parallel systems usually is responsible for the management of low level issues such as communication and synchronization. This is potentially problematic from the perspectives of correctness and portability. This paper considers an alternative approach, namely, the use of high level parallel programming systems. We report our experiences with implementing paral... View full abstract»

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  • System-level testing assignment for hypercubes with lower fault bounds

    Publication Year: 1995, Page(s):136 - 142
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB)

    The maximum allowed number of faulty processors in an n-dimensional hypercube system is n under PMC model for diagnosis. When the n fault bound is adopted, all links will be used to perform diagnosis. However, if the fault bound is lower than n, many links can be freed from the task of performing diagnosis. In this paper, we show that each drop of the fault bound by 1 can free 2n-1 link... View full abstract»

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  • A performance evaluation methodology for computer systems

    Publication Year: 1995, Page(s):713 - 719
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    This paper presents a simulation methodology for evaluating the performance of CISC and RISC computer systems. Our method is called message flow technique (MFT). MFT is a modification of the instruction flow technique (IFT) we presented for RISC previously. The proposed methodology was applied to a single and two-level cache-based complex instruction set computer system using 80486 SX as a case st... View full abstract»

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  • Logic, fault, and design error simulation based on an integrated hardware array

    Publication Year: 1995, Page(s):410 - 415
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    Simulation is essential for the design and verification of digital systems and simulation tools are widely used to analyze the behavior of digital circuits. This paper describes an integrated hardware array specialized for digital logic, fault, and design error simulation. Hardware simulation, using a high performance special purpose architecture such as the integrated hardware array, is still a v... View full abstract»

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  • A method for logic design of ATM adaptation layer protocol

    Publication Year: 1995, Page(s):536 - 542
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB)

    In an asynchronous transfer mode (ATM)-based broadband integrated services digital network (BISDN), an ATM adaptation layer (AAL) is needed to adapt each non-ATM application to the ATM layer. This paper proposes an abstract AAL logic design methodology which combines the concept of `quotient problem' defined by Calvert and Lam, 1987, with the concept of supervisory control in the context of discre... View full abstract»

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  • A modified hyperbolic congruential frequency hop codes for asynchronous event signaling

    Publication Year: 1995, Page(s):666 - 670
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    We show that the modified hyperbolic congruential frequency hop codes have almost ideal properties for code division multiple access (CDMA) communications, that is, for any pair of the codewords they have at most two hits for any frequency shift under a synchronous environment and at most four hits for any time and frequency shift under an asynchronous environment. Efficient algorithms for decodin... View full abstract»

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  • Study of integrated bandwidth allocation and multiplexing strategy for VP-based ATM networks

    Publication Year: 1995, Page(s):226 - 232
    Cited by:  Papers (3)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (532 KB)

    Strategies of the integrated multiplexing and bandwidth allocation based on the virtual path (VP) is realized and simulated. Effects of different virtual channel (VC) grouping policies are explored to derive the best efforts for the traffic multiplexing within a VP. According to the simulation results, a two level multiplexing structure is proposed to reduce the complexities of handling a large nu... View full abstract»

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  • A mediated approach to open, large-scale information management

    Publication Year: 1995, Page(s):115 - 121
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB)

    The explosive expansion of the communications infrastructure, both within and among computing organizations, poses new challenges to the design of distributed information systems. Software systems are required that are open, that can be scaled to extremely large sizes, and that can be constructed and used effectively. The huge amount of information being made available through network technology i... View full abstract»

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  • The RAPID transport protocol

    Publication Year: 1995, Page(s):277 - 282
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB)

    Future networking environments are expected to provide more bandwidth and be more robust to bit errors. Such changes will pose new requirements for data transfer protocols. Rather than trying to adapt an existing transport protocol to this new environment, we decided to develop a new one called RAPID. The most important features of RAPID are its unidirectional data transfer capability and a clear ... View full abstract»

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  • Ascend/descend algorithms on Cayley graphs

    Publication Year: 1995, Page(s):249 - 255
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    In a fundamental paper, F.P. Preparata and J.E. Vuillemin (1981) introduced the cube connected cycles graph and demonstrated a congestion free implementation of an ascend/descend algorithm. Subsequently, it was shown that the cube connected cycles graph is the Cayley graph of a group, the wreath product. We isolate the properties required of a Cayley graph that enable a congestion free implementat... View full abstract»

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  • Issues in software cycle time reduction

    Publication Year: 1995, Page(s):302 - 309
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB)

    During the early days of commercial software development, cost and performance were the factors that received the most attention as an area for improvement. In the 1980's quality and productivity have received a great deal of attention. It appears that, in the 1990's reducing software development time will be one of the primary goals of large and small software companies alike. To this end it is a... View full abstract»

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  • ATM LAN interconnections with a cut-through nonblocking switch

    Publication Year: 1995, Page(s):578 - 584
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (572 KB)

    The paper presents a cut through ATM switch with shared buffers for LAN interconnections. The incoming ATM cells are not stored into shared buffers as long as the destination output port is available. In other words, an ATM cell is waiting at the input port. It will be passed through the switch using a cut through link, if the destination output port is available. On the other hand, it will be sto... View full abstract»

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  • Timing driven genetic algorithm for standard-cell placement

    Publication Year: 1995, Page(s):403 - 409
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    In this paper we present a timing-driven placer for standard-cell IC design. The placement algorithm follows the genetic paradigm. At early generations, the search is biased toward solutions with superior timing characteristics. As the algorithm starts converging toward generations with acceptable delay properties, the objective is dynamically adjusted toward optimizing area and routability. Exper... View full abstract»

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  • Multiprocessor system verification through behavioral modeling and simulation

    Publication Year: 1995, Page(s):396 - 402
    Cited by:  Papers (5)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB)

    The long development times and high costs of multiprocessor (MP) designs arise from their design complexity. To reduce the time and costs, it is critical that design bugs are detected early in the development cycle using design verification tools. The traditional method of hardware design verification is to simulate the actual hardware designs, usually specified in a hardware description language ... View full abstract»

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  • Adaptive proportional rate control for ABR service in ATM networks

    Publication Year: 1995, Page(s):529 - 535
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (684 KB)

    The emergence of asynchronous transfer mode (ATM) technology has generated new challenging problems for computer network designers. One of these challenges lies in the efficient management of ATM traffic so that the communication bandwidth of the network can be optimally utilized. Considerable standardisation efforts in recent ATM Forum activities have been centered on the traffic management of av... View full abstract»

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  • Optical backplane demonstrators using micro-optics and smart pixel transceiver arrays

    Publication Year: 1995, Page(s):179 - 183
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB)

    We have demonstrated a representative portion of an optical backplane using FET-SEED smart pixels and free-space optics to interconnect printed circuit boards (PCBs) in a two board, unidirectional link configuration. 4×4 arrays of FET-SEED transceivers were designed, fabricated, and packaged at the PCB level. The optical interconnection was constructed using diffractive microoptics, and cust... View full abstract»

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  • An Object-Oriented approach in C++ for asynchronous processing in CMISE-applications

    Publication Year: 1995, Page(s):366 - 372
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (560 KB)

    This paper introduces a set of C++ classes which provide a framework for development of CMISE-applications. The nature of processing that is common to all CMISE-applications is abstracted in interdependent base classes. These classes are designed so that application-specific requirements are met without the necessity of modifying existing code: open to specific requirements but closed to modificat... View full abstract»

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