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[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track

3-6 Jan. 1989

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  • Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Vol.I: Architecture Track (IEEE Cat. No. 89TH0242-8)

    Publication Year: 1989
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    Freely Available from IEEE
  • Experiments with a virtual tree machine using transputers

    Publication Year: 1989, Page(s):355 - 364 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (804 KB)

    A number of experiments with a virtual process tree architecture called ZAPP (zero assignment parallel processor) are described. These experiments were performed using a network of Inmos transputers. Most of the experiments involve the parallel execution of simple process trees grown by rewrite rules that recursively decompose a large grain of work into smaller grains. Some experiments extend the ... View full abstract»

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  • A system design for real-time fault-tolerant computer networks

    Publication Year: 1989, Page(s):346 - 354 vol.1
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    A system design that provides efficient self-testing and optimal real-time diagnosis for multiprocessor computer networks is presented. In this design, a test is performed by running a common system task on two processors and comparing their signal signatures, obtained from the data port and the control register. A simple diagnosis structure to be derived from a given system architecture is propos... View full abstract»

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  • Approaches to optical microprogramming

    Publication Year: 1989, Page(s):469 - 472 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    Approaches to the optical implementation of the stored-program concept are presented. The focus is on microprogramming, which is commonly used to organize data flow at the lowest hardware level. It is shown that the traditional implementation used in electronic computers maps easily into optics in many ways. A distributed addressing approach provides a simple solution, while a centralized addressi... View full abstract»

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  • A massive memory supercomputer

    Publication Year: 1989, Page(s):338 - 345 vol.1
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB)

    An approach to supercomputing that is based on using a massive main memory (in the order of gigabytes) is investigated. Many of the problems currently solved on conventional supercomputers can equally be solved in similar time on such a machine, with a modest processor speed. The advantages of this approach in supporting database applications, VLSI applications and many other applications working ... View full abstract»

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  • Space-variant optical parallel logic gate technique and its application to cellular logic architectures

    Publication Year: 1989, Page(s):460 - 468 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    A general approach is described for optically implementing massively parallel logic. A space-variant logic related to the MIMD (multiple-instruction-multiple-data) logic operation technique is proposed and extended to a ternary logic. A cellular array based on the ternary logic is proposed, and its application to a dynamic interconnection architecture in which optical data flow is changed by an op... View full abstract»

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  • MPC-multiprocessor C language for consistent abstract shared data type paradigms

    Publication Year: 1989, Page(s):171 - 180 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (780 KB)

    Multiprocessor C (MPC), a C language preprocessor that assists a programmer in building efficient parallel programs, is described. MPC provides the programmer with a virtual implementation machine, the consistent abstract shared data type implementation machine (CASDTIM). The machine is described and an analytical model for predicting performance of MPC programs using the CASDTIM is presented. The... View full abstract»

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  • Extended ASLM-a reconfigurable database machine

    Publication Year: 1989, Page(s):329 - 337 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (648 KB)

    The architectural features of the ASLM database machine are explored, and the retrieval aspect of incorporating a comprehensive null value policy into the design of ASLM is examined. The join operation is used as a performance measure in the evaluation of ASLM. The extension of ASLM to a multiuser/multiprogram environment by dynamic reconfigurability of the hardware resources among a set of concur... View full abstract»

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  • Register window management for a real-time multitasking RISC

    Publication Year: 1989, Page(s):135 - 142 vol.1
    Cited by:  Papers (5)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (588 KB)

    An architecture is proposed that allows fast procedure calls, low-overhead task switches, and primitives, which assist in queue-oriented intertask communications. This is accomplished by managing the registers as noncontiguous register windows. The details of the register granularity are hidden from the applications program. The architecture is based on a VLSI CPU called the MULTIS, which is capab... View full abstract»

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  • Optical modules for future signal processing systems

    Publication Year: 1989, Page(s):450 - 459 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (972 KB)

    Analog optical modules must be part of a larger signal-processing system, and it is difficult to pass information from an optical module operating near maximum throughput to the other parts of a signal-processing system. The basis for this difficulty is often thought to be the high bandwidth and large number of channels of the optical module, but more quantitatively, optical modules do not yet hav... View full abstract»

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  • BOLD: The Boulder Optimal Logic Design system

    Publication Year: 1989, Page(s):59 - 73 vol.1
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1240 KB)

    The BOLD (Boulder-Optimal Logic Design) system is a set of software tools that optimally transform an arbitrary combinational logic description into a standard cell, gate array, or complex CMOS gate technology. The design philosophy and structure of BOLD are summarized, and the various software tools and algorithms that comprise the BOLD system are described. The input to BOLD is either a behavior... View full abstract»

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  • Time complexity modeling and comparison of parallel architectures for Fourier transform oriented algorithms

    Publication Year: 1989, Page(s):160 - 170 vol.1
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1028 KB)

    A technique for modeling the time-domain complexity of the implementation of an algorithm is described. The model includes algorithm-, architecture-, and technology-related parameters. The model is used here to compare architectures for various Fourier-transform-oriented algorithms; however, use of the model can point to possible changes in algorithm or architecture that will increase performance.... View full abstract»

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  • The design of processing elements on a multiprocessor system with a high-bandwidth, high-latency interconnection network

    Publication Year: 1989, Page(s):319 - 328 vol.1
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (872 KB)

    A description is given of the ways in which the environment of a highly parallel, high-latency interconnection network is different from that encountered in a uniprocessor system. The impact of these differences on the design of the processing elements is discussed. Methods that can be used to evaluate the impact of architectural choices on the performance of any system that uses a similar network... View full abstract»

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  • G-32-a high performance VSLI 3-D computer

    Publication Year: 1989, Page(s):127 - 134 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (616 KB)

    A 3-D computer is characterized by sufficient speed of CPU computation, high I/O throughput, and an efficient interrupt-handling capability. The architecture of a high-performance 32-bit three-dimensional (3-D) computer, based on a custom-designed VSLI chip set is described. The G-32 consists of a single-board CPU, up to two single-board dual-bus input/output sequencers, and a memory subsystem exp... View full abstract»

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  • Design of the Titan graphics supercomputer

    Publication Year: 1989, Page(s):223 - 229 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (576 KB)

    The Titan was intended to be a personal visualization tool, i.e. a machine that would allow an engineer or scientist to model a physical entity and then visualize the results of the model. This was achieved by the use of several technologies, namely, dense CMOS gate arrays, a commercial RISC IPU (reduced-instruction-set computer instruction processing unit), and pipelinable floating-point units, a... View full abstract»

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  • Emerging design style: how does it impact the way we design?

    Publication Year: 1989, Page(s):2 - 4 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    The stringent requirements imposed by socioeconomic forces on the computer industry and on the community of scientists and engineers is examined. The ways in which these requirements have been met, through the use of technologies, design tools, equipment, process and facility control, quality assurance and testing, and sophisticated production methodologies are discussed View full abstract»

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  • A coherent system for performing an optical transform

    Publication Year: 1989, Page(s):445 - 449 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    A coherent optical system for performing an arbitrary linear transform is described. The system consists of a holographic mask and two Fourier lenses. A set of equations for determining the amplitude-phase distribution of the mask is given, and the mask is generated by combination of a computer-generated hologram and optical holography. As an example, a Walsh-Hadamard transform of order 32 is real... View full abstract»

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  • Spatial light modulators for optical computing and information processing

    Publication Year: 1989, Page(s):416 - 423 vol.1
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (596 KB)

    A review of spatial light modulator (SLM) technologies is presented, including the description and performance parameters of the principal devices and their main applications for optical information processing. The various performance tradeoffs and their impact on emerging technologies and future trends of spatial light modulators are discussed. Three recently introduced SLM devices are briefly de... View full abstract»

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  • Application-transparent process-level error recovery for multicomputers

    Publication Year: 1989, Page(s):296 - 305 vol.1
    Cited by:  Papers (9)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (956 KB)

    An application-transparent, process-level, distributed error recovery scheme for multicomputers is proposed. Checkpointing is initiated by timers at intervals determined by the needs of the application. Checkpointing and recovery involve only as much of the system as is necessary: a set of interacting processes. Processes that are not part of the interacting set do not participate in checkpointing... View full abstract»

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  • The design of an integrated environment for the automated synthesis of small computer systems

    Publication Year: 1989, Page(s):49 - 58 vol.1
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (780 KB)

    The synthesis tools provided by the MICON system are described. They are M1, which utilizes a knowledge-based approach to represent and apply design knowledge, and the knowledge acquisition tool CGEN, which allows hardware designers to deposit their expertise into M1 without writing any code. The authors explore the development of an automated design environment for M1/CGEN, where computer design ... View full abstract»

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  • Design management in a workstation environment

    Publication Year: 1989, Page(s):111 - 117 vol.1
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    Problems with present VLSI design management approaches are outlined, and areas for improvement are identified. A design management that will facilitate the correct and timely creation of VLSI designs is proposed, concentrating on the problems associated with designing ICs using a network of engineering workstations. The requirements for such a system are discussed from both a practical and theore... View full abstract»

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  • Tailoring functional units and memory in a high performance Prolog architecture

    Publication Year: 1989, Page(s):375 - 384 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    A description is given of PLUM, a Prolog machine with multiple specialized functional units and memory ports that operate in parallel using data-driven control. Unification parallelism is utilized by multiple unification units. Bookkeeping operations, such as choicepoint and environment manipulation, are executed by special functional units in parallel with unification. The performance of the syst... View full abstract»

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  • Hardware support to operations of relational algebra

    Publication Year: 1989, Page(s):191 - 200 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    A novel approach is presented to the hardware implementation of the operations of relational algebra. A sorting algorithm that is suitable for hardware implementation is proposed. It can be applied to conventional computer systems without changing their architecture. For its implementation a sorting circuit is proposed whose processing time is linearly proportional to the number of data sorted. Th... View full abstract»

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  • Characterization of the faulted behavior of digital computers and fault tolerant systems

    Publication Year: 1989, Page(s):152 - 159 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB)

    Research that is being conducted to characterize the latent fault in digital fault-tolerant systems is addressed. A series of investigations that have led to the development of a practical high-speed gate-level logic simulator is described. The validation of the high-speed simulator, using faultable software, and hardware simulations of a prototype MIS-STD-1750A processor are discussed View full abstract»

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  • HP Precision: a spectrum architecture

    Publication Year: 1989, Page(s):242 - 251 vol.1
    Cited by:  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (832 KB)

    The author discusses the Hewlett-Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity... View full abstract»

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