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Electronic Circuits and Systems, IEE Proceedings G

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Electronic Circuits and Systems, IEE Proceedings G

Issue 6 • Date Dec 1988

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Title History

Fast multidimensional discrete Hartley transform using Fermat number transform

Design of minimum phase FIR digital filters

Low power dynamic ternary logic

8×8 bit pipelined Dadda multiplier in CMOS

Fault diagnosis in combinational digital circuits using a backtrack algorithm to generate fault location hypotheses

Piecewise polynomial models for MOSFET DC characteristics with continuous first order derivative

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