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Microprocessor or ASIC - Choice and Implementation, IEE Colloquium on

Date 21 Dec 1988

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Displaying Results 1 - 7 of 7
  • A micropower microprocessor digital indicator

    Page(s): 7/1 - 7/2
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (92 KB)  

    The standard method of analogue data transmission in the process control industry for many years has been the 4-20 mA current loop. It was decided to offer a digital variant of this meter which was plug-in compatible with the analogue version. The salient features of the new meter were as follows: full four-digit LCD display with analogue bar-graph; digital display end-points customer programmable for direct readout in engineering units; direct replacement for analogue version; low cost, not significantly greater than the analogue meter movement it would replace; operable over the industrial temperature range; and intrinsically safe. These features combined to require considerable signal processing and I/O capability yet allow operation at less than a milliwatt power consumption. The need to take both power and measurement from a terminal voltage of less than 0.5 V required a novel design approach in regard of the input circuitry which has since been patented View full abstract»

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  • IEE Colloquium on `Microprocessor or ASIC - Choice and Implementation' (Digest No.140)

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    The following topics were dealt with: ASICs; gate arrays; programmable logic; microprocessor chips; and design engineering View full abstract»

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  • ASIC v. microprocessor-choice and implementation. Case study-TV control

    Page(s): 4/1 - 4/2
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    The author considers the functionality provided by remote control TV tuner chips and concludes that they are probably overspecified. An understanding of how the specification might be relaxed led to the replacement of one of these ASICs with a mask programmed microcontroller. The benefits were considerable and included: the ability to add unique features to allow the OEM to differentiate his product in the market place, the ability to alter the functionality up to a late stage in the development programme, including last minute market driven features, design skills required for software development are more readily obtainable than corresponding ASIC experience, significant parts cost saving (approximately 50%), and fast mask turnaround (4-6 wks) on the chosen microcontroller View full abstract»

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  • Gate array or microcontroller? The engineers dilemma. A 4-bit microcontroller replacement case study

    Page(s): 2/1 - 2/2
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    The microcontroller to be replaced formed the heart of a particular type of telephone, one that could prevent the dialling of unauthorised calls. This product was known as the Securacall, and consisted of a standard push-button telephone with extra circuitry to effect the required functions. It was intended that the replacement version would incorporate extra facilities. To demonstrate the enhanced version to interested parties, software was written in PASCAL, compiled into machine code, and downloaded to a Motorola 68000 general purpose development board, to simulate the functions of the new Securacall. This gave positive feedback, and allowed modification of the functions themselves, before the final specification was written. In choosing the new microcontroller chip the factors taken into account were: development time, ease of development, emulation capability, future modifications, and proven design path View full abstract»

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  • Case study: design and development of a transcoder chip for CT2

    Page(s): 5/1 - 5/6
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    Describes a modular design methodology to develop an CMOS ASIC Voice Coder device for use in the CT2 Digital Cordless Telephone Application. It also features complex cells, which can be used in conjunction with other library components, like standard cells, ROM, RAM etc. to create MACROCELLS such as the ADPCM (Adaptive differential pulse code modulation) cell used in the Voice Coder View full abstract»

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  • Case study-speech terminal interface

    Page(s): 6/1 - 6/3
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    Describes the design of a digital interface for a CCITT High Quality Speech Terminal using DSP techniques to compress 7 kHz bandwidth audio signals into 64 kbit/s. The decision process involved in choosing between two different solutions is described and reasons given for the final compromise. CCITT Recommendation G722 defines the characteristics of an audio coding system which may be used for a wide variety of high quality speech and data applications. The algorithm has been implemented using Digital Signal Processors (DSPs) to compress 7 kHz audio signals and up to 16 kbit/s of auxiliary data into a single 64 kbit/s digital bitstream. This is the basic channel for the Integrated Services Digital Network (ISDN) and most private digital circuits View full abstract»

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  • Design advantages using logic cell arrays

    Page(s): 3/1 - 3/5
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    Considers some of the design advantages which can accrue from using field programmable ASICs rather than standard parts. These advantages are illustrated by the description of a typical system design based on the logic cell array, which is a field programmable semi-custom device. The CMOS LCA is unique, in programmable logic array terms, in that the configuration is controlled by the contents of an on-chip static memory. It should be noted that although the capacity of the LCA is usually quoted in terms of equivalent gates (up to 9000) the logic is actually realised in terms of look-up tables. The LCA is based on an array of Configurable Logic Blocks (CLBs) and Input/Output Blocks (IOBs) View full abstract»

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