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Advanced A/D and D/A Conversion Techniques and Applications, IEE Colloquium on

Date 8 May 1989

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Displaying Results 1 - 8 of 8
  • Improving DAC linearity by threshold tracking

    Publication Year: 1989, Page(s):1/1 - 1/4
    Cited by:  Papers (1)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (208 KB)

    A previously reported technique for digitally mapping the transfer functions of ADCs is extended to cover Digital to Analogue Converters as well. Simulation results are presented which show how well the modified Threshold Tracking Algorithm can reduce integral nonlinearity and the harmonic distortion introduced by reconstructing sampled signals View full abstract»

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  • Design of sigma-delta modulation converters for telecommunication applications

    Publication Year: 1989, Page(s):6/1 - 6/8
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (224 KB)

    Sigma-delta modulation can provide a highly accurate signal digitisation process with appropriate system design. For telecommunication purposes the two most important performance parameters are output signal to noise ratio and frequency response. Speech channels have standard performance specifications and the properties of the signals are well documented. With the development of the Integrated Se... View full abstract»

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  • IEE Colloquium on `Advanced A/D and D/A Conversion Techniques and Applications' (Digest No.72)

    Publication Year: 1989
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (32 KB)

    The following topics were dealt with: DAC linearity; coding; sigma-delta modulation; DSP chips; telecom applications View full abstract»

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  • Efficient realisation of a combined D/A and A/D interface for DSP processors

    Publication Year: 1989, Page(s):5/1 - 5/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (196 KB)

    Propose an interface for a single DSP chip performing a simultaneous transmit and receive function. Examples of this situation are where data modems operate in full duplex, or with speech encryption where the DSP performs a scrambling function. The parameters to which the proposed interface is designed are: accuracy to 12 bits and bandwidth to 3 kHz. These performance criteria are satisfactory to ... View full abstract»

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  • The advantages of strictly digital dither

    Publication Year: 1989, Page(s):2/1 - 2/3
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (128 KB)

    The use of dither to improve coarse quantisation is a well established practice. The dither is a second independent signal added at any point during the analogue-to-digital conversion process. Normally, the dither is added to the signal prior to conversion but it is equally valid to add the dither in the digital domain. This paper will compare the quantisation error resulting from the application ... View full abstract»

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  • A 14 bit 400ns ADC

    Publication Year: 1989, Page(s):7/1 - 710
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (400 KB)

    This paper describes the results of a computer simulation to predict the performance of a 14 bit direct interpolation analogue to digital converter (ADC) and these results are used to design a 14 bit prototype system. Dynamic tests of this prototype system are then presented View full abstract»

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  • Feedback coding techniques-review and implementation

    Publication Year: 1989, Page(s):3/1 - 3/8
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (300 KB)

    In the last two years there has been a great resurgence in interest in feedback coding techniques as a means to achieving high accuracy, high resolution signal conversion. Feedback coding offers a conversion technique which requires no sample and hold; no matched resistor networks; no accurate external references; and virtually no external components to the integrated converter View full abstract»

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  • A review of sigma-delta modulation structures

    Publication Year: 1989, Page(s):4/1 - 4/8
    Cited by:  Papers (1)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (228 KB)

    The increasing availability of high capacity data communication networks has generated a demand for accurate, fast and low power dissipation analogue to digital signal converters. Such converters are now required to convert a wide range of signals to binary weighted pulse code modulated format. The use of sigma-delta modulation for the primary data conversion is very attractive, since it uses a on... View full abstract»

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