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Programmable Logic Devices for Digital Systems Implementation, IEE Colloquium on

Date 25 May 1990

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  • IEE Colloquium on `Programmable Logic Devices for Digital Systems Implementation' (Digest No.090)

    Publication Year: 1990
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (16 KB)

    The following topics were dealt with: programmable logic devices; logic design; digital system design; erasable PLDs; asynchronous sequential circuits; signal processing; and PLDs in education View full abstract»

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  • Use of programmable logic devices as an aid to system design

    Publication Year: 1990, Page(s):1/1 - 1/5
    Cited by:  Patents (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (272 KB)

    Discusses the problems associated with developing application specific integrated circuits (ASICs) for commercial products and outlines some of the benefits that can be achieved by using bread-boarding with programmable logic devices (PLDs). It then considers an actual example and describes some of the CAD tools used. The paper then moves on to examine some of the PLD families available today and ... View full abstract»

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  • Design of self-clocked sequential circuits using logic cell arrays

    Publication Year: 1990, Page(s):2/1 - 215
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (364 KB)

    A systematic method of design for asynchronous sequential circuits using Logic Cell Arrays such as XILINX 2000 or 3000 series is presented. In this method each state is represented by a separate flip-flop whose clock signal is generated locally. State machines of considerable size can be accommodated on a single chip and in most applications the outputs are readily available on the chip without th... View full abstract»

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  • A low cost route to EPLDs

    Publication Year: 1990, Page(s):3/1 - 3/3
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (72 KB)

    For teaching the concepts of programmable logic devices to second year Electrical and Electronic Engineering degree students, access to some form of programmable logic was required. This had to be cheap, easy to program but flexible, with most of the functions of more expensive systems. That is, easy logic design, JEDEC output, test vectors and simulated operation. The solution chosen was to use P... View full abstract»

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  • The use of EPLD's in the teaching of digital systems design

    Publication Year: 1990, Page(s):4/1 - 4/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (188 KB)

    For the 3 years to 1990, 140 electronics and computing students in the faculty of information technology have been exposed to eraseable programmable logic devices (EPLD's) from their first year. Despite the initial trepidation at such large numbers and range of backgrounds, the introduction has been successful and the use of EPLD's is seen by students to be a natural way to implement medium perfor... View full abstract»

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  • Programmable logic arrays for prototype computer implementation

    Publication Year: 1990, Page(s):5/1 - 5/3
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (124 KB)

    Discusses the prototyping of MUSHROOM, a RISC processor designed to support object-oriented and symbolic processing languages such as Smalltalk-80 and Lisp respectively. In many respects, MUSHROOM resembles the mass of RISC architectures now dominating the 32-bit processor market. The ability to reconfigure nearly instantaneously is clearly a major advantage of LCA devices over UV erasable or fuse... View full abstract»

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  • An EPLD eases acoustic signal processing

    Publication Year: 1990, Page(s):6/1 - 6/2
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (104 KB)

    Describes the use of one erasable PLD device, the EP1800, in an application where it provided a most elegant solution to an engineering problem. The Altera EP1800 is a 2100 gate equivalent part and is the largest PAL architecture device made by that company. Here it is used as a microprocessor peripheral in the navigation system of an underwater vehicle. It was a requirement of the design that 24 ... View full abstract»

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