International Zurich Seminar on Digital Communications, Electronic Circuits and Systems for Communications.

5-8 March 1990

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Displaying Results 1 - 25 of 37
  • Advanced VLSI technology and design techniques for future telecom systems

    Publication Year: 1990, Page(s):3 - 26
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (517 KB)

    The impact of the introduction of telecommunication products, such as next-generation switching systems, optical transmission, and digital cellular radio, on VLSI technology and design methodology is discussed. It is shown how design concepts, supported by appropriate CAD (computer-aided design) tools, can make designs of complexities of up to 700000 transistors with operating frequencies of up to... View full abstract»

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  • An all-digital audioconference system

    Publication Year: 1990, Page(s):163 - 172
    Cited by:  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (393 KB)

    An all-digital audioconference bridge based on a four-wire network connection has been implemented. The audioconference bridge is implemented as a wire-wrap plug-in board to a digital exchange on a 2.048 Mb/s 32-channel PCM (pulse code modulation) link. The digital system is superior to the existing analog audioconference systems both in terms of setup time and quality of transmission. A general b... View full abstract»

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  • 1990 International Zurich Seminar on Digital Communications. Electronic Circuits and Systems for Communications. Proceedings (Cat. No.90TH0305-3)

    Publication Year: 1990
    Request permission for commercial reuse | PDF file iconPDF (15 KB)
    Freely Available from IEEE
  • A multichannel optical network

    Publication Year: 1990, Page(s):306 - 320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    The performance of a network based on an optical star is discussed. Destination nodes are addressed by directly sending the information on the channel reserved to that node. Simulation of the network shows that the throughput-delay characteristic is dramatically affected by the output capabilities of the network nodes, i.e., by the number of packets they can simultaneously send. In particular, nod... View full abstract»

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  • Performance comparison of data manipulator type interconnection networks

    Publication Year: 1990, Page(s):387 - 409
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    A class of packet switched multistage interconnection networks based on PM2I interconnection functions is considered. This class of multistage interconnection topologies, called data manipulator networks, is analyzed using a novel approach to the performance evaluation of interconnection networks that has been developed in order to explain more accurately their various properties and capabilities ... View full abstract»

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  • M-ary continuous phase frequency shift keying transmissions through nonlinear channels in additive Gaussian noise and cochannel interferences

    Publication Year: 1990, Page(s):495 - 511
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    The problem of evaluating the performance of M-ary continuous-phase frequency shift keying (CPFSK) signals transmitted through an arbitrary bandpass nonlinearity (BPNL) in the presence of additive Gaussian noise (AGN) and cochannel interference (CCI) is considered. The proposed nonlinear channels are two-link satellite channels. The satellite system consists of a ground transmitter, a sat... View full abstract»

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  • Implementing VLSI components in telecommunications systems: benefits and pitfalls

    Publication Year: 1990, Page(s):292 - 303
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    It is noted that VLSI components for applications in telecommunications systems can be classified in three different categories: standard circuits like microprocessors and memory chips, extensively standardized telecommunication-specific circuits such as codecs, filters, and customized ASICs (application-specific integrated circuits). The use of such components offers the system designer excellent... View full abstract»

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  • A processor scheduling design for gateways in heterogeneous data networks

    Publication Year: 1990, Page(s):373 - 386
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    The performance of the limited-k policy for processor scheduling in gateways is analyzed. For bilateral gateways handling inbound and outbound traffic between a subnetwork and the backbone, this policy limits the number of messages served by the processor in one direction before switching to the other direction. The limited-k policy provides two tunable parameters for controlling... View full abstract»

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  • On MMSE timing recovery using oversampling

    Publication Year: 1990, Page(s):474 - 494
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    The realization of stochastic gradient MMSE (minimum mean square error) time recovery algorithms for digital receivers is analyzed and discussed in the framework of the hypothesis of oversampling the received signal with respect to synchronous sampling. It is shown that very simple and effective algorithms, especially suitable for digital implementation, are possible. A convergence analysis based ... View full abstract»

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  • Procedure to align octets in broadband applications using chips in homogeneous technology

    Publication Year: 1990, Page(s):284 - 291
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    A method for synchronization of broadband bit streams is described. It provides: alignment of octets in one step, avoiding shift operations in the serial-parallel conversion; cell delineation; shortest resynchronization time; and easy board layout by avoiding timing constraints. The method provides the best synchronization performance for ATM (asynchronous transfer mode) applications View full abstract»

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  • Packet-switching network architectures for very-high-speed service

    Publication Year: 1990, Page(s):336 - 351
    Cited by:  Papers (4)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    It is suggested that mesh-topology networks, deflection routing (DR), and backward learning (BL) are very attractive means for extending, to a geographical area, the services provided by LANs and MANs (local and metropolitan area networks). Unlike ring and bus topologies, mesh networks provide multiple paths between sources and destinations, which in turn offer very high connection reliability and... View full abstract»

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  • Design of an enhanced FDDI-II system

    Publication Year: 1990, Page(s):418 - 432
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (580 KB)

    It is pointed out that the growing demand for more bandwidth and integrated telecommunication services in the customer premises area can be satisfied with the hybrid high-speed local area network FDDI-II (fiber distributed data interface). A hardware design based on existing highly integrated components for the FDDI protocol is presented. The design contains all features according to the proposed ... View full abstract»

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  • A GaAs SONET framer IC for broadband subscriber loop applications

    Publication Year: 1990, Page(s):363 - 372
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (248 KB)

    An experimental prototype high-speed SONET (Synchronous Optical Network) framer IC designed for possible broadband subscriber loop applications is presented. The experimental prototype IC, implemented in a GaAs enhancement/depletion (E/D) MESFET technology, performs 8:1 multiplexing, 1:8 demultiplexing, byte alignment, and SONET frame detection functions. The chip operates at data rates up to 1.24... View full abstract»

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  • All-digital pseudo-coherent (PC) FSK modems

    Publication Year: 1990, Page(s):463 - 473
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    A detailed study of the PC (pseudocoherent) and DID (double-integrate-and-dump) FSK (frequency shift keying) demodulators by computer simulation is presented. In addition, the hardware realization of the demodulators is described. It is shown that both demodulators perform nearly as well as the coherent schemes. They are also both basically suitable for realizing a VLSI for FSK modems. Typical sil... View full abstract»

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  • Realization of broadband data services in ATM-networks

    Publication Year: 1990, Page(s):73 - 86
    Cited by:  Papers (1)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    It is pointed out that broadband data services are expected to play an important role in the future B-ISDN (broadband integrated services digital network) which will be based on the ATM (asynchronous transfer mode) transmission technique. The authors first describe some significant broadband data applications. They then focus on the realization of broadband LAN (local area network) interconnection... View full abstract»

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  • Subscriber loop components for the Basel communication system B-ISDN field trial

    Publication Year: 1990, Page(s):47 - 60
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    The authors outline the Basle-based field trial BASKOM and give a system description showing the structure and functions of the broadband integrated services digital network (B-ISDN) switching and transmission system. Besides full ISDN capability, the network supports broadband (140 Mb/s) dialogue and retrieval services. Comprehensive terminal equipment for optimal accommodation of user requiremen... View full abstract»

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  • Silicon bipolar technology-a versatile base for high-speed communication circuits

    Publication Year: 1990, Page(s):27 - 38
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    The technical requirements on versatile IC technologies include speed capability for operation in the 10 GHz range and above; low power consumption in the 1-5 GHz range for possible battery power supply; capability of high-precision analog functions at ultimate speed; uniformity and reliability for mass production; and capability of integration of complex systems on single chips. An overview is pr... View full abstract»

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  • All-digital synchronizers for DPSK demodulators

    Publication Year: 1990, Page(s):268 - 283
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    Maximum a posteriori (MAP) and data transition tracking loop (DTTL) synchronizers are developed for the differential phase shift keying (DPSK) scheme. In their original form, these synchronizers require substantial hardware for their realization. By some simplifications, hardware complexity can be considerably reduced. Simplified all-digital MAP and DTTL synchronizers are suggested. The hardware n... View full abstract»

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  • Cell alignment in ATM systems via header error check: performance evaluation and hardware considerations

    Publication Year: 1990, Page(s):115 - 130
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (460 KB)

    Cell synchronization for an asynchronous transfer mode (ATM) system via header error check is discussed, and a possible hardware implementation is given. For a performance evaluation the essential parameters are average cell loss and mean block length of the consecutively lost cells. For these parameters, formulae, or at least lower and upper bounds in closed form, are derived. The derivation is b... View full abstract»

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  • A Bi-CMOS ATM switching LSIC

    Publication Year: 1990, Page(s):195 - 210
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB)

    An IC designed for a high-speed broadband ISDN switching system is described. The IC was fabricated using a BiCMOS RAM and logic gate array. The IC has functions for cell buffering, switching, and VCI conversion. It features a pipeline configuration and a high-speed ECL (emitter coupled logic) interface for a throughput of 1.2 Gbit/s. Tests confirmed accurate switching. Using this IC, an ATM (asyn... View full abstract»

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  • Towards a special multitasking microprocessor for public-network telecom applications

    Publication Year: 1990, Page(s):243 - 255
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB)

    The multitasking support of some of the most advanced of today's microprocessors is investigated in order to derive design directives for a special microprocessor architecture devoted to applications in public network telecom systems. The brands selected are the INMOS transputer, the VL86C020 Acorn RISC (reduced instruction set computer) Machine (ARM) manufactured by VLSI Technology, and Intel's i... View full abstract»

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  • Survivable SuperNetwork-a 100 Mbit/s LAN with arbitrary redundancy

    Publication Year: 1990, Page(s):321 - 335
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (708 KB)

    SuperNetwork is a fiber-optic network presently available with a 100 Mbit data rate, capable of supporting a very large host population and readily attached to other networks such as Ethernet and FDDI. A way that SuperNetwork can be made resistant to multiple simultaneous faults by the use of redundancy is described. In general, the level of redundancy that can be installed is limited only by cost... View full abstract»

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  • Fairness, priority and predictability of the DQDB MAC protocol under heavy load

    Publication Year: 1990, Page(s):410 - 417
    Cited by:  Papers (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    In the spring of 1989, the IEEE 802.6 Metropolitan Area Network Standards Committee chose to modify the queue-arbitrated DQDB (Distributed Queue Dual Bus) protocol. The heavy load and overload behavior of this DQDB version is examined. Extensive simulation studies show the protocol behavior to be extremely complex so that this study is restricted to a carefully selected set of scenarios that prese... View full abstract»

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  • Scalable architecture for large scale switching network

    Publication Year: 1990, Page(s):352 - 362
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (612 KB)

    An alternative approach to constructing a scalable broadband communication switch, based on a three-dimensional mesh topology, is described. It is motivated by the recognition that large-scale switching structures are wire limited; the complexity of what can be physically implemented is limited by its total wiring complexity. By analyzing the communication requirements of a switching network, the ... View full abstract»

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  • Exploitation of redundancy for throughput increase in a high speed LAN

    Publication Year: 1990, Page(s):433 - 462
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    Different techniques for improving the exploitation of resources in a high-speed local area network (LAN) are assessed. The techniques analyzed are all based on the exploitation of the redundant resources often introduced in the transmission system to increase the network's fault tolerance. The different strategies are defined for a 100-Mb/s token ring LAN. In order to assess the different strateg... View full abstract»

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