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Advances in Analogue VLSI, IEE Colloquium on

Date 14 May 1991

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Displaying Results 1 - 9 of 9
  • The development of a mixed signal design tool

    Publication Year: 1991, Page(s):5/1 - 5/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (148 KB)

    The Plessey Design Modelling (PDM) System was devised to enable the rapid development of a mixed analog digital ASIC. Traditional methods of IC design development are breadboarding and simulation. The simulation of a design has advantages over breadboarding in that the design is captured in software, enabling design management, checks, typical, best and worst case simulations, and changes that can... View full abstract»

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  • Advances in switched-current techniques for analogue signal processing

    Publication Year: 1991, Page(s):4/1 - 4/9
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (372 KB)

    The main advantage of the switched-current technique, when compared to switched-capacitors, is its compatibility with digital VLSI technology. This makes the technique particularly well suited to mixed-mode applications, such as sigma-delta and algorithmic converters. The switched-current memory cell (also known as the current copier) was initially conceived to overcome the inherent matching limit... View full abstract»

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  • Approaches to ultra-narrow-band analogue IC filter design using switched-capacitors

    Publication Year: 1991, Page(s):2/1 - 2/9
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (352 KB)

    The standard single path switched capacitor technique, when applied to Ultra Narrow-Band (UNB) applications has several disadvantages. The use of frequency translation and multi-path techniques has resolved several problems encountered and they are reviewed. Particular attention is paid to the N*M-path architecture which uses pseudo-N-path (PNP) filters as sub-filters. The revived use of PNP path ... View full abstract»

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  • GaAs monolithic active filters

    Publication Year: 1991, Page(s):3/1 - 3/7
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (308 KB)

    High-precision sampled data switched capacitor filters using GaAs up to at least 100 MHz are feasible using fast-settled op-amps and therefore continuous-time GaAs filters should be feasible at much higher frequencies into the GHz band. In the present paper, the authors present preliminary ideas on two different approaches. The first is based on simulation of inductors in LCR networks using capaci... View full abstract»

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  • Analogue VLSI-applications of the technique

    Publication Year: 1991, Page(s):1/1 - 1/3
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (132 KB)

    Probably the earliest area in which analogue VLSI gained hold was in radio receivers. Work on radiopaging receivers using direct conversion techniques has led to the acceptance by the marketplace of this approach, while recent developments in the field of logarithmic amplifiers has seen performances produced that would have been considered impossible in a production environment ten years ago. Howe... View full abstract»

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  • IEE Colloquium on `Advances in Analogue VLSI' (Digest No.099)

    Publication Year: 1991
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (124 KB)

    The following topics were dealt with: analogue VLSI; active filters; switched filters; and CMOS neural networks mixed signal design View full abstract»

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  • Synthesis of a class of artificial neural network using a CMOS current mode building block approach

    Publication Year: 1991, Page(s):8/1 - 810
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (372 KB)

    An analogue current mode design methodology is presented for the implementation of binary associative memories. Thus by using the Hamming feedfoward network as an example of a binary associative memory, and efficiently mapping it into two CMOS-VLSI building block configurations a prototype ANN is developed. The IC building blocks utilizes the characteristics of the subthreshold region and converge... View full abstract»

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  • The design and testing of an analogue neuron

    Publication Year: 1991, Page(s):7/1 - 7/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (192 KB)

    Describes a neural architecture which requires a low number of I/O connections and can be used directly with scanned data sources. The circuits used and the testing of the device are also described. The Frame Based Architecture is a cascadable neural network implementation architecture. It is capable of computing fully connected networks in real time with frame based data sources and externally st... View full abstract»

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  • Analogue CMOS techniques for VLSI neural networks: process invariant circuits and devices

    Publication Year: 1991, Page(s):6/1 - 6/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (176 KB)

    VLSI neural networks are based on a two-dimensional array of synapses. A synapse is a 2 quadrant multiplier. It multiplies the incoming neural state, Vj, by its synaptic weight, Tij. A column of synapses feeds into a neuron which sums all of their multiplication results. From the VLSI viewpoint, there are two approaches the first of which is to use digital m... View full abstract»

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