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IEEE International Symposium on Circuits and Systems

1-3 May 1990

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Displaying Results 1 - 25 of 820
  • A 5 ns 1 Mb BiCMOS SRAM with ECL I/O interface

    Publication Year: 1990, Page(s):1995 - 1998 vol.3
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (427 KB)

    A high-speed X-address decoding scheme with wired-OR bipolar predecoders and partial decoding level converters is presented. In addition, a sensing scheme with small signal voltage swing (particularly for read bus lines) is described. These two high-speed schemes and a double-level polysilicon layer, double-level metal layer, 0.8- mu m BiCMOS process technology were used to implement a 5-ns addres... View full abstract»

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  • Realization of Boolean functions by perceptron algorithm

    Publication Year: 1990, Page(s):704 - 705 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (103 KB)

    Summary form only given. A two-step design procedure is proposed so that any Boolean function can be realized by the reliable perceptron algorithm. The first step is the learning phase. In the second step, the outputs are simply connected to an OR-gate, a perceptron by itself.<> View full abstract»

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  • A first-order current-steering sigma-delta modulator

    Publication Year: 1990
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (28 KB)

    Summary form only given, as follows. A new architecture is presented for a first-order sigma-delta modulator. The system can operate at a high sampling frequency, can be used as a building block for higher-order modulators, and employs circuit techniques that are largely technology-independent. The system was realized in a 2- mu m n-well, double-metal single-poly CMOS technology. The circuit occup... View full abstract»

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  • Adaptive forward-backward filtering of images

    Publication Year: 1990, Page(s):3134 - 3137 vol.4
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (516 KB)

    An adaptive forward-backward filtering method for image enhancement based on the two-dimensional Bayesian estimate of images is presented. As the steady-state gain can be preevaluated, this algorithm is fast and simple. An example shows that this filtering is better than the two-dimensional Bayesian estimate in smoothing noise and preserving the details of images.<> View full abstract»

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  • 1990 IEEE International Symposium on Circuits and Systems (Cat. No.90CH2868-8)

    Publication Year: 1990
    Request permission for commercial reuse | PDF file iconPDF (14 KB)
    Freely Available from IEEE
  • Automatic tuning of quality factors for VHF CMOS filters

    Publication Year: 1990, Page(s):1147 - 1150 vol.2
    Cited by:  Papers (6)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (252 KB)

    A VHF transconductance-C filter technique with automatic tuning of the quality factors and the cutoff frequency, based on a voltage controlled oscillator (VCO), is presented. The Q-tuning circuit is very simple and contains no signal carrying nodes, resulting in a well-controlled Q up to very high frequencies (100 MHz). A breadboard realization of the Q-tuning circuit ga... View full abstract»

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  • Automatic generation of don't cares for the controlling finite state machine from the corresponding behavioral description

    Publication Year: 1990, Page(s):1143 - 1146 vol.2
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    A symbolic analysis method is described and applied to register-transfer microprograms describing control units of hardware controllers. It automatically generates program invariants and next uses them to optimize the logic realization of the control finite state machine (FSM). The method calculates the microprogram invariants, symbolic states, and relations. These data are used to find products o... View full abstract»

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  • A new capacitor-ratio-independent algorithmic analog-to-digital converter

    Publication Year: 1990, Page(s):2228 - 2231 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    The design of a capacitor-ratio-independent algorithmic analog-to-digital converter (ADC) that is inherently insensitive to both capacitor ratio and amplifier offset voltage due to the use of switched-capacitor techniques is described. It can also be realized in a small chip area using p-well CMOS technology. This A/D converter completes n-bit conversion in 2n clock cycles, which... View full abstract»

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  • Design of the fully connected binary neural network via linear programming

    Publication Year: 1990, Page(s):1094 - 1097 vol.2
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    An attempt is made to develop an alternative to the Hebbian-hypothesis-based design, using a powerful linear-programming (LP)-based algorithm. The LP-based algorithm attempts to build around each pattern to be stored a ball with a prespecified radius (in the Hamming distance sense) which is the ball of convergence for the pattern: when the network starts as one of the states in the ball, it will e... View full abstract»

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  • Generation of finite state machines from parallel program graphs in DIADES

    Publication Year: 1990, Page(s):1139 - 1142 vol.2
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (500 KB)

    A method is presented for describing parallel program graphs in a high-level synthesis system. Such descriptions are, in general, similar to Karp and Miller parallel program schemata and are more general than Petri nets. It is shown how these graphs are converted to sequential program schemata and then to finite state machines (FSMs) in such a way that the number of states is minimized. The entire... View full abstract»

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  • Neural network design using linear programming and relaxation

    Publication Year: 1990, Page(s):1090 - 1093 vol.2
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (348 KB)

    Two new approaches to designing Hopfield neural networks using linear programming and relaxation are presented. These approaches are shown to be the natural ones given the form of the network dynamics. Computer simulations show that linear programming and relaxation are more effective than the sum of outer products rule in that they provide a larger capacity for the network. The new approaches are... View full abstract»

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  • PDL++: an optimizing generator language for register transfer design

    Publication Year: 1990, Page(s):1135 - 1138 vol.2
    Cited by:  Papers (7)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB)

    PDL++, an optimizing generator language for register transfer systems lets users write C++ programs that generate register transfer machines and optimize the logic design using misII. It is shown that a register transfer generator language greatly simplifies the description of many sequential systems, mainly because it frees the designer from worrying about design optimization and makes the genera... View full abstract»

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  • A network that uses the outer product rule, hidden neurons, and peaks in the energy landscape

    Publication Year: 1990, Page(s):196 - 199 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    The results of the development and simulation of an extended version of the discrete Hopfield neural network are summarized. The network uses hidden neurons to optimize the orthogonality of the memory space. The process is fast because it is noniterative, and the design is such that a hardware implementation would require no executive processor during memory storage or retrieval. Simulations indic... View full abstract»

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  • Exact analysis and sensitivity of nonideal switched capacitor networks through op amp asymptotic modelling

    Publication Year: 1990, Page(s):2201 - 2204 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (312 KB)

    A computer-oriented method for exact frequency-domain analysis of nonideal switched-capacitor (SC) networks is presented. It is based on the utilization of an SC macromodel for the operational amplifiers (op amps) when its own clock frequency tends to infinitum. This method extends the capability of a similarly based one previously developed by the authors. Its application allows the z-do... View full abstract»

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  • Distributed RC-filters with linearized MOS-transistors in CMOS technology

    Publication Year: 1990, Page(s):2385 - 2387 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (196 KB)

    Two distributed RC filters (a low-pass and a bandpass) that use MOS transistors as distributed RC lines are presented. A scheme for compensating for nonlinearities in the MOSFET is used. Simulation results for a 2-μm CMOS p-well process (MOSIS) are presented. High programmability is expected from two tuning points: the gain of the voltage amplifier to control the Q of... View full abstract»

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  • A neural network solutions for routing in three stage interconnection networks

    Publication Year: 1990, Page(s):483 - 486 vol.1
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    A neural network solution to the problem of routing calls through a three-stage interconnection network is presented. The neural network is shown, via a theorem with proof, to select an open path through the interconnection network if one exists. The solution uses a Hopfield network with a binary threshold rather than a sigmoidal function. The weights of the neural network are fixed for all time, ... View full abstract»

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  • A new multiplier-divider circuit based on switched capacitor data converters

    Publication Year: 1990, Page(s):2224 - 2227 vol.3
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (220 KB)

    A method for the realization of analog multiplier-divider circuits is presented. The method uses a modified cyclic data converter that operates sequentially as an analog-to-digital converter (ADC) and as a multiplying digital-to-analog converter (DAC) in such a way that it performs the analog operation: ν0=Vx Vy/VZ. The sali... View full abstract»

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  • Configuration and performance of modulated filter banks

    Publication Year: 1990, Page(s):1809 - 1812 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (336 KB)

    The performance issues relating to the transmultiplexers previously synthesized by the authors (see Proc. IEEE Int. Conf. Acoust., Speech, and Signal Processing, Albuquerque, NM, April 1990) are examined. The transmultiplexers consist of modulated filter banks based on one or two low-pass prototypes. The limitations of the configured systems regarding intersymbol interference and crosstalk suppres... View full abstract»

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  • On the design of time-invariant N-path filters

    Publication Year: 1990, Page(s):2157 - 2160 vol.3
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    The problem of designing analog N-path filters which are time-invariant and which exhibit single-band or multiband frequency responses is addressed. Specifically, the authors devise design procedures that give the required number of paths and the corresponding period of the modulating functions. The resulting number of paths is no larger (usually smaller, sometimes significantly smaller) ... View full abstract»

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  • Model selection by cross-validation

    Publication Year: 1990, Page(s):2760 - 2763 vol.4
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB)

    The cross-validation principle is used to address the task of model selection. Assuming that a set of probabilistic models is given or constructed, the derivation of a selection rule via Bayesian predictive densities is discussed. A selection rule is derived for the set of nested normal linear regression models. Conditioned on the assumption that the true model is in the set of examined models, th... View full abstract»

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  • Compensation of sample-and-hold distortion through zero insertion

    Publication Year: 1990, Page(s):2786 - 2788 vol.4
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    An analytic method for the compensation of the (sin x)/ x distortion inherent to digital or sampled-data systems with continuous-time output signals is presented. The compensation is achieved through the insertion of a pair of finite zeros in the transfer function of the system. Simple expressions are provided for the calculation of the magnitude and the Q-factor of the ... View full abstract»

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  • Scale invariance and the upper limits of interconnection complexity

    Publication Year: 1990, Page(s):192 - 195 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    A definition of interconnection complexity in terms of a constant scale-invariant dimensions of information flow is presented. The proposal that all interconnection networks must be characterized by a constant dimensionality if they are to interconnect an arbitrarily large processing system is discussed. This construction hypothesis is applied to neural networks. The results of a series of experim... View full abstract»

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  • Reciprocative multirelation arrays

    Publication Year: 1990, Page(s):1591 - 1595 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (540 KB)

    A processor array architecture based on a novel dataflow scheme is reported. It is shown that the reciprocative multirelation arrays (RMA) dataflow provides optimal efficiency of processor utilization. An abstract framework is used as a description of the general principle, and different operational units are `plugged' into the framework to implement different algorithms. Suitable applications are... View full abstract»

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  • An adaptive neural network filter for evoked potentials

    Publication Year: 1990, Page(s):1086 - 1089 vol.2
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (220 KB)

    The possibility of using the multilayer perceptron (MLP) neural network for the processing of EEG evoked potentials (EPs) is examined. A structure composed of the cascade of a MLP and a linear combiner is proposed. Experimental results, both on synthetic and real data, show that the method provides good results with very few EP ensembles and without the necessity of prior knowledge of the signal c... View full abstract»

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  • Finite series solution for loaded uniform RC lines

    Publication Year: 1990, Page(s):2381 - 2384 vol.3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    The time-domain voltage step response of a loaded uniform RC line is derived in the form of a finite series. The locations of the poles are expressed as a function of the load parameters, yielding an approximate closed-form solution. Expressions for the delay time of RC lines are obtained. These apply to the cases of resistive, capacitive, and parallel R-C load... View full abstract»

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