Scheduled System Maintenance
On Tuesday, September 26, IEEE Xplore will undergo scheduled maintenance from 1:00-4:00 PM ET.
During this time, there may be intermittent impact on performance. We apologize for any inconvenience.

IEE Colloquium on Applications Specific Integrated Circuits for Digital Signal Processing

7 Jun 1993

Filter Results

Displaying Results 1 - 10 of 10
  • Development of a single chip digital beamforming network

    Publication Year: 1993, Page(s):4/1 - 4/7
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (348 KB)

    Describes the development of the ERA DBF1108 single ASIC digital beamforming network, aimed at satellite communications applications. A brief introduction to the principles of digital beamforming is followed by an outline of the design and an explanation as to how the architecture was developed from the overall system requirements. Key design considerations were, minimum part count and power consu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • ASIC design for communications satellite payloads

    Publication Year: 1993, Page(s):5/1 - 5/3
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (156 KB)

    With the recent feature size reductions and the improvements in radiation hardness of CMOS technology it is becoming attractive to include multi-ASIC DSP processors within the payload of communications satellites. Key constraints specific to satellites are low mass and power overheads, parameters that are minimised using advanced signal processing algorithms and top down design techniques. This pa... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An ASIC implementation of a sub-band filter bank

    Publication Year: 1993, Page(s):6/1 - 613
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (452 KB)

    Sub-band filtering is a frequency domain technique using linear filters to separate a finite duration sequence into a set of frequency bands. The technique can be used to decorrelate an image into a number of `sub'-images, representing different frequency bands within the original image spectrum. Each frequency band can then be quantised according to its perceived importance in the original image.... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Digital filter ASICs

    Publication Year: 1993, Page(s):7/1 - 7/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (228 KB)

    The decision to implement digital filters as ASICs has generally been made on the basis of either cost or power. However, size and performance are equally adequate reasons for implementing digital filters as ASICs. Since the filter characteristics and the required response is known and able to be defined, the development of an ASIC does not pose any significant specification risks. This paper disc... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • ASICs for DSP

    Publication Year: 1993, Page(s):1/1 - 1/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (200 KB)

    The problems of design and verification of a large digital ASIC have been discussed in many publications. Requirements for testability, power consumption, reliability and performance give the designer many issues to consider. Now, with a DSP system to implement, the designer has a whole range of additional problems: the choice of architecture, the word length required for coefficients and variable... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Generality-a low cost approach to digital image processing

    Publication Year: 1993, Page(s):9/1 - 9/4
    Cited by:  Papers (1)  |  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (288 KB)

    The growing market for multimedia and computer vision applications has generated a great deal of commercial interest in video signal processing solutions. Current approaches use dedicated ASICs or large arrays of high performance DSPs such as the TMS320C40. The authors propose a video signal processor, VSP, targetted to accelerate primitive operations commonly encountered in image processing. Rece... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Reconfigurable DSP systems

    Publication Year: 1993, Page(s):3/1 - 3/6
    Cited by:  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (292 KB)

    Presents a new approach to the implementation of DSP structures that combines many of the benefits of ASIC-based systems with those of DSP processors. It is part of the work that the authors are engaged in to design and implement efficient DSP structures using hard-wired logic. The proposed technique utilises high density programmable logic devices (PLDs) to realise DSP structures that can be rapi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • IEE Colloquium on `Applications Specific Integrated Circuits for Digital Signal Processing' (Digest No.1993/141)

    Publication Year: 1993
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (12 KB)

    The following topics were dealt with: DSP chips; reconfigurable systems; beamforming; communications satellite applications; digital filters; and image processing View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Specification, design and implementation of a digital binary image processing ASIC

    Publication Year: 1993, Page(s):8/1 - 8/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (248 KB)

    A novel binary image processing ASIC is described. The architecture of this ASIC is particularly well suited to high-speed nonlinear functions. The ASICs function is to filter an incoming data stream which represents an image of width 512 pixels. The data is initially thresholded to a binary data stream. This resulting data stream is then fed through a series of line delays, to effect a 3 by 3 pix... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • DSP algorithms to optimised ASICs-an automated route

    Publication Year: 1993, Page(s):2/1 - 2/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (372 KB)

    Design automation tools that support DSP designers to develop and explore DSP algorithms have been successfully used for many years. They provide the most productive route to commercial DSP processors but, to date, have not provided an automatic route to ASICs that yields the level of optimisation needed to implement, effectively, the arithmetic intensive functionality of DSP applications. This pa... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.