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Design and Application of Parallel Digital Processors, 1988., International Specialist Seminar on the

Date 11-15 Apr 1988

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Displaying Results 1 - 25 of 35
  • Design by calculation and proof

    Page(s): 87 - 93
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (432 KB)  

    Expounds a philosophy of engineering design which is stimulated, guided and checked by mathematical calculations and proofs. The philosophy is illustrated by a familiar example, the design of a hardware circuit for addition of natural numbers in binary representation View full abstract»

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  • Multiprocessor realtime applications

    Page(s): 15 - 20
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (688 KB)  

    Even before microprocessors made the use of multiple processors so attractive, realtime or embedded systems were often built with multiple processors because of considerations such as attaining reliability through redundancy or reducing bandwidth requirements by remote data reduction. Today systems employing multiple processors have so many advantages that they are a serious contender for almost any realtime or embedded system. The paper reviews issues that affect the design and evolution of realtime applications that run on multiple processors View full abstract»

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  • A linear algebra library for high performance computers

    Page(s): 199 - 200
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (100 KB)  

    Gives a brief description of a project to design and implement a transportable linear algebra library in Fortran 77 for efficient use on high-performance computers. The library will be based on the well-known and widely used packages EISPACK and LINPACK for solving eigenvalue problems and linear equation and linear least squares problems respectively. As with EISPACK and LINPACK, the library will be freely available View full abstract»

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  • Fractal graphics and image compression on a DAP

    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (92 KB)  

    The work of M. Barnsley and others at Georgia Institute of Technology, (Byte, P.215, January 1988) is producing dramatic results for high compressed graphics and images using Fractal based techniques for both movies and stills. Compression ratios of around 10000 to 1 are claimed. An important limitation is that both compression and regeneration are computationally intensive; Barnsley has mentioned up to 100 hours to compress a high quality image on a Masscomp workstation, and 30 minutes for regeneration. Algorithmic advances are reducing these times, but this paper outlines how SIMD array processors (in particular, the AMT DAP 510) can dramatically improve the performance View full abstract»

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  • Functional programming on the GRIP multiprocessor

    Page(s): 116 - 127
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (764 KB)  

    Most MIMD computer architectures can be classified as tightly-coupled or loosely-coupled, depending on the relative latencies seen by a processor accessing different parts of its address space. By adding microprogrammable functionality to the memory units, the authors have developed a MIMD computer architecture which explores the middle region of this spectrum. This has resulted in an unusual and flexible bus-based multiprocessor, which is being used as a base for research in parallel functional programming languages. The authors introduce parallel functional programming, and describe the architecture of the GRIP multiprocessor View full abstract»

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  • Transformation of occam programs

    Page(s): 180 - 188
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (748 KB)  

    The value of formal techniques in conventional software engineering is starting to gain recognition even outside academic computer science departments. We maintain that their use is essential in taming the extra complexity that accompanies the extra power that concurrency brings: for while in a FORTRAN program, say, the contribution of the `program counter' to the number of states that need to be considered is the sum of the contributions of its component modules, in a highly parallel program it is their product. Various paradigms of parallel programming have been suggested, all with much the same expressive power. The authors deal with one of the most tractable: synchronising communications. The authors describe their work on formal manipulation of occam, and give an example of a practical application of program transformation techniques View full abstract»

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  • Neural network computation

    Page(s): 160 - 162
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (220 KB)  

    Since 1982 there has been an enormous resurgence of interest in the possibility of making trainable, general purpose pattern recognition machines which are intended to mimic some of the processing abilities of human brains. A neural network `computer' consists of a set of processing units (or artificial neurons) joined together by a set of weighted connections. Such networks are programmed by applying training patterns which fix the output states of some or all of the units, and a learning algorithm then adjusts the connections in response to the training patterns. The author provides an introduction to the field and to the current state of the art View full abstract»

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  • A 3D vision system for robotics

    Page(s): 43 - 47
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (376 KB)  

    Presents an overview of the Sheffield AIVRU 3D vision system for robotics. The system currently supports model based object recognition and location; its potential for robotics applications is demonstrated by its guidance of a UMI robot arm in a pick and place task. The system is currently being developed to allow robot navigation by utilising visual feedback. The idea is to exploit the temporal coherence that exist in a sequence of images in order to provide quickening strategies View full abstract»

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  • The Computing Surface

    Page(s): 139 - 142
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (336 KB)  

    The Computing Surface is a flexible, extensible computing system which is constructed from a choice of intelligent building blocks. A variety of building blocks are available with a range of computational or peripheral capabilities View full abstract»

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  • SUPRENUM: a massively-parallel machine for numerical applications

    Page(s): 163 - 171
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (656 KB)  

    A detailed discussion of the hardware and software architecture of the SUPRENUM supercomputer is presented. A largely bottleneck-free interconnection structure is accomplished in a hierarchical manner: the machine consists of up to 16 `clusters', and each cluster consists of 16 `working nodes' plus some organizational nodes. The node is accommodated on a single circuit board; its architecture is based on the principle of data structure architecture explained in the paper. SUPRENUM is strictly a message-based system; consequently, the local node operating system has been designed to handle a secured message exchange with a considerable degree of hardware support and with the lowest possible software overhead View full abstract»

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  • Scientific simulation on parallel hardware

    Page(s): 21 - 29
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    Gives a brief classification of parallel computers, and concentrates on a few applications which have been mounted on a number of different machines. Some of these applications have been chosen simply to demonstrate the peculiar problems that these fascinating machines generate. Programming these machines is much more intellectually satisfying, demanding a much more disciplined working practice View full abstract»

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  • Parallel processing and database architectures

    Page(s): 48 - 52
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    A fundamental mismatch between programming tools and the nature of real hardware has been removed by the introduction of parallel processes to the model of computation. This is exemplified by the programming language occam (trade mark of the INMOS group of companies), which implements Communicating Sequential Processes (CSP) on INMOS transputers. The paper notes some of the characteristics of applications written in the CSP style and suggests some of the ways in which they may influence the design of future large data base systems. Current n-ary and binary data base data models are reviewed in the light of the outstanding functional limitations of todays data base systems. It is suggested that extensions to the models could significantly change the way data is viewed in real time distributed data bases and will interact strongly with the model of computation used to animate the static data store View full abstract»

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  • Applications of parallel processors in molecular biology

    Page(s): 53 - 56
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (312 KB)  

    Molecular biology analyses the molecular basis of living systems. The chemical complexity of biological systems of importance (e.g. enzyme action, organelle assembly, membrane transport, antigen-antibody reactions, cell recognition and many others) is at the extreme end of the range to which many physical methods of analysis can be applied. Developments will follow progress in the physical sciences, which in turn depends extensively on high performance computer modelling and investigation. The author discusses two major areas of computer applications in molecular biology, which exploit massively parallel computing systems View full abstract»

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  • Concurrency and communication in Delta Prolog

    Page(s): 94 - 104
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (932 KB)  

    Describes and exemplifies the logic programming language Delta Prolog, an extension to Prolog to include AND-concurrency and interprocess communication. Besides its declarative semantics, its operational semantics, comprising distributed backtracking, is especially emphasized. The extension is obtained, at the language level, by introducing three additional goal types: splits, events, and choices. At the implementation level, the extension is provided by code in Prolog and C. A small number of core primitives facilitates portability. Currently Delta-Prolog supports distributed programs through the asynchronous execution of multiple instances of an extended C-Prolog View full abstract»

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  • Formal derivation of hardware

    Page(s): 189 - 193
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    Looks at the need for more formality in hardware design. This is because (a) increasing complexity is pushing present techniques to their limits; and (b) computer systems are more and more often being put in charge of human lives. Systems for aircraft flight control, nuclear reactor shut-down, patient care in hospital and so on must not only be correct they must be seen to be correct. Formal methods are the only practical way to achieve this standard of correctness and reliability View full abstract»

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  • Parallel processing-parallel thinking-the needs of a National Strategy

    Page(s): 202 - 203
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (116 KB)  

    There are three possible solutions to satisfy the demands for increased computing performance: increased MICRO miniaturisation could, theoretically, enable von Neumann machines to be constructed in smaller and smaller physical volumes that would enable the frequency/wavelength dichotomy to be controlled; a space-time computing machine could be designed that takes account of the fundamental physics of matter-but this does not appear to be on the horizon; or computing machines can adopt parallelism as a means of implementing high performance computing structures. Only the third provides an immediate solution to satisfy the demands for increased computing speed. Within the previous two years from the time of writing (1988) a variety of new computing structures have been marketed on the principals of SIMD or MIMD, while the INMOS Transputer is an example, par excellence, of a component that has been developed to create the means to implement Parallel Computing Structures. The author looks at the need for a National Strategy for parallel processing View full abstract»

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  • A loosely coupled parallel LISP execution system

    Page(s): 128 - 133
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (552 KB)  

    There are many ways in which it is possible to start the quest for parallelism in a computing system. The work described in this paper started from a number of clear criteria which have shaped the whole project. These are presented and explained in the first section, and this leads directly to the hardware environment. The software environment forms the subject of the second section. There are a number of basic enabling technologies on which the work is based, and these are explained here. The third part of the paper describes the multiprocessor LISP system constructed, and the fourth section gives some details of the discrete event simulation system, the CPAS project, being built on these principles, concentrating on the currently achieved state rather than the goal. The paper finishes with some assessment and speculation: the extent to which the work has succeeded, and how far the principles can be used in a wider context View full abstract»

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  • Replacing hardware that thinks (especially about parallelism) with a very smart compiler

    Page(s): 153 - 159
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (544 KB)  

    There is a tradeoff that touches many areas of computing: doing work at run time, usually in the hardware, vs. doing work in software at compile time. This tradeoff exists in some very visible and other not as visible places in any computer system. One surprising place in which it has a large effect is in the specification of fine-grained parallelism. The author examines that tradeoff, particularly in the light of VLIW architectures. VLIWs are very parallel new machines that take the software alternative to the extreme. They are the flip side of dataflow architectures, finding the same individual operation level of parallelism, but dataflow's opposite along the axis represented by the above tradeoff. In the past year, surprisingly successful general-purpose computers have been built from VLIW technology View full abstract»

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  • Parallel finite elements

    Page(s): 11 - 14
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (288 KB)  

    Finite element software represents one of the most important and widely used classes of scientific and engineering packages. A further attraction, in terms of a demonstrator on any new computer architecture, is that such a package requires very large amounts of both numerical and nonnumerical computing resources and will therefore, allow a critical appraisal of a new configuration View full abstract»

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  • The Cedar parallel processor: machine organization and software

    Page(s): 62 - 66
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (392 KB)  

    Cedar is a shared-memory parallel processor organized into processor clusters. A prototype of this machine is being built at the University of Illinois at Urbana-Champaign. There are three levels of parallelism in Cedar. The vector and intracluster parallelism are controlled by the hardware, and the intercluster parallelism can be accessed via Xylem, the operating system. Xylem also provides facilities to manually control part of the memory hierarchy. The machine will be programmable in several languages. The first compiler being implemented is an extension of FORTRAN. The Cedar system will also include a variety of programming tools such as parallelizers and debuggers View full abstract»

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  • The effective use of SIMD processor arrays

    Page(s): 143 - 147
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (332 KB)  

    Many computationally intensive problems have a very high degree of structured, fine-grain parallelism and benefit substantially from highly parallel execution. Such problems map efficiently on to truly parallel SIMD (Single Instruction stream, Multiple Data stream) processor arrays. This is essentially because the control, synchronisation and communication associated with the constituent parallel processes are implicit in the simplicity and regularity of the control and communication structure of such an architecture. To effectively use a processor array requires a mapping of the regular data structures and operations implied by the algorithms on to the regular structure of the hardware. The paper investigates this general mapping problem with particular emphasis on an `indirect' approach known as parallel data transforms View full abstract»

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  • On new generation dataflow architecture

    Page(s): 112 - 115
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    Dataflow machines execute instructions only when the operands are available. Therefore each execution of instructions are treated as an independent event and exploitation of maximum concurrency at a scalar level, vector level, and function level is achieved. The author describes the architecture of a dataflow supercomputer, SIGMA-1, developed over several years. Since the SIGMA-1 system forms a pipeline through the processing elements and the networks, it can attain a high performance when programs have enough concurrency to supply data to the input buffer of the processing element continuously View full abstract»

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  • The Edinburgh Concurrent Supercomputer: project and applications

    Page(s): 172 - 179
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    The Edinburgh Concurrent Supercomputer (ECS) project is built around a Meiko Computing Surface, and offers a networked multi-user facility for academic, industrial and commercial applications. The authors describe first the background to the project, and the present status of funding, hardware and software. The facility has presently more than 100 registered users, the authors describe some of the applications which are in production or under development View full abstract»

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  • Chess on a hypercube

    Page(s): 30 - 42
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    The authors have developed a parallel chess program to run on distributed memory, multiple instruction stream computers. The program follows the strategy of currently successful sequential chess programs: searching of an alpha-beta pruned game tree, iterative deepening, transposition and history tables, specialized endgame evaluators, and so on. The search tree is decomposed onto a hypercube (an NCUBE) using a recursive version of the principal-variation-splitting algorithm. Roughly speaking, subtrees are searched by teams of processors in a self-scheduled manner View full abstract»

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  • Benchmarking parallel architectures

    Page(s): 134 - 138
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    In the developing world of parallel processing, there is a fundamental reason for benchmarking. The prime motivation for parallelism is better exploitation of VLSI technology and the role of benchmarking is wider than mere customer evaluation: it is needed to guide the improvement of parallel machines and the genesis of new parallel architectures. The author looks at the problems of benchmarking parallel architectures, and evaluates two strongly differentiated parallel architectures for evaluation (i) the SIMD processor array Mil-DAP, developed jointly by ICL and RSRE from the ICL Distributed Array Processor (DAP) (now re-designed as the AMT DAP-500, which is 1.4 times faster than Mil-DAP), and (ii) networks of T414 Transputers, including a Meiko computing surface and prototypes of the reconfigurable RTP machine View full abstract»

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