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Circuit Theory and Design, 1989., European Conference on

Date 5-8 Sep 1989

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Displaying Results 1 - 25 of 143
  • Implementation of parallel (P,Q) counters for high-speed array multipliers

    Publication Year: 1989 , Page(s): 171 - 175
    Cited by:  Patents (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (364 KB)  

    Both the (5,3) counter and (2,2,3) counter multiplication techniques are investigated for the efficiency of their operation speed and the viability of the architectures when implemented in a fast bipolar ECL technology. The implementation of the counters in series-gated ECL and threshold logic are contrasted for speed, noise immunity and complexity, and are critically compared with the fastest practical design of a full-adder. A novel circuit technique to overcome the problems of needing high fan-in input weights in threshold circuits through the use of negative weighted inputs is presented. The authors conclude that a (2,2,3) counter based array multiplier implemented in series-gated ECL should enable a significant increase in speed over conventional full adder based array multipliers View full abstract»

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  • Differential pass-transistor logic partial-product generator for iterative multipliers

    Publication Year: 1989 , Page(s): 176 - 179
    Cited by:  Papers (5)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (328 KB)  

    A reconfigurable iterative multiplier-accumulator (IMAC) that confines all configuration-dependent logic functionality to the partial-product generator (PPG) has been presented. Software generated standard cell, composite logic gate, and differential pass-transistor logic (DPTL) circuits were considered for the PPG implementation. It was found that for this arithmetic application DPTL had significant advantages in terms of area and expansibility when compared to the other circuit styles. The result is an IMAC that can be easily reconfigured using automated techniques, effectively providing flexibility in choosing the area and speed tradeoff best suited to the application View full abstract»

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  • A carry save architecture for primitive operator digital filters

    Publication Year: 1989 , Page(s): 180 - 184
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (244 KB)  

    The authors have introduced a method for efficiently decomposing a directed graph into carry save and accumulate sections, in such a way as to facilitate the direct application of Boolean reduction techniques. This approach has been shown in the given example to offer complexity savings, in excess of 25%, over previous primitive operator realisations. Greater reductions have been achieved for longer more representative graphs. It has also been shown that the method is capable of accommodating negative coefficient values through the incorporation of a carry correction adder at the filter output View full abstract»

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  • A methodology for automated generation of analogue integrated circuits

    Publication Year: 1989 , Page(s): 624 - 628
    Cited by:  Papers (3)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (484 KB)  

    A number of researchers have directed their efforts to expert system methods in order to automate the analogue design process. Generally, these systems combine algorithmic and heuristic knowledge together with design procedures of expert circuit designers to aid the generation of sized transistor level circuits from performance specifications. In this paper the authors first review some existing approaches and then introduce a new approach which overcomes several of their drawbacks. To provide a suitable benchmark for the comparison of these approaches they first describe the familiar analogue circuit design process. So far, only operational amplifiers have been considered View full abstract»

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  • A general dynamical system model arising from electrical networks

    Publication Year: 1989 , Page(s): 557 - 560
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (228 KB)  

    A network Π has a state-space description, if the dynamic space 𝒟Π of Π is a smooth surface embedded in the configuration space ΣΠ of Π, and there is a well-defined ordinary differential equation on 𝒟Π describing the dynamics of Π. In the general case, one then has the problem of finding both the dynamic space and the dynamic equation of the network. In this report, the state-space problem in the theory of nonlinear networks is considered in the generalized context of the dynamical systems modeling View full abstract»

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  • Design method of FIR digital filters with arbitrary passband by using interpolation techniques

    Publication Year: 1989 , Page(s): 6 - 10
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (192 KB)  

    Using this method it is possible to implement a narrowband filter with fewer than 30 percent multipliers of the direct form, and a wideband lowpass filter with fewer than 40 percent multipliers of usual one. It shows the effectiveness of our proposed design method View full abstract»

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  • Two pole, high speed operational amplifier modelling, methods and techniques

    Publication Year: 1989 , Page(s): 304 - 308
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (412 KB)  

    In this paper an initial review of existing techniques for two stage operational amplifier modelling is described and the deficiencies of these techniques identified. In particular, the commonly used Miller's Approximation is shown to present a quite significant error when applied to high frequency op-amp designs. Two new accurate equivalent models for two pole amplifier architectures are then presented. These new models facilitate precise prediction of pole locations of both input and output stage dominant pole amplifiers, irrespective of the value of feedback capacitance and second stage transconductance. They also feature design flexibility and are readily applied to two pole operational amplifiers. An example of a two-stage CMOS operational amplifier design is presented to demonstrate the application of the new equivalent circuits View full abstract»

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  • A multirate algorithm for fast circuit simulation

    Publication Year: 1989 , Page(s): 46 - 50
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (328 KB)  

    A new multirate algorithm for circuit simulation that combines the efficiency of event-driven techniques with the simplicity of explicit integration to successfully decrease the overall run-times, is described. The method uses discretization in the voltage axis and exponentially fitted integration formulas to avoid stability problems inherent to traditional explicit integration schemes, and uses a new and effective step control algorithm to take full advantage of the multirate behaviour of large circuits and further increase the performance of the simulation View full abstract»

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  • The convergence of Volterra series describing lowpass OTA-capacitor (OTA-C) filters

    Publication Year: 1989 , Page(s): 661 - 664
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (212 KB)  

    The region of convergence of Volterra series describing continuous-time lowpass filters based on OTA-C integrators has been considered. Firstly the filter containing one OTA-C integrator has been studied. In this case for low frequency signals the Volterra series is an ordinary power series with an appointed radius of convergence. In a more general case when the circuits containing more than one nonlinear element for continuous and bounded input signals, one can only determine sufficient conditions for which the Volterra series is convergent. In particular, simple conditions of convergence for lowpass second-order OTA-C filters are presented. Using known numerical methods for computing the solution of the nonlinear equation, the size of the region of convergence can be determined more exactly. The method developed here is applied to determine the amplitude of an input harmonic signal for typical values of parameters View full abstract»

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  • Computer aided design of a microwave MESFET DRO

    Publication Year: 1989 , Page(s): 561 - 565
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (196 KB)  

    Describes the extension of an oscillator synthesis procedure, to incorporate a coupled dielectric resonator (DR) and hence enable the synthesis of a MESFET DRO (dielectric resonator stabilised oscillator). The synthesis strategy employed for MESFET oscillator design is described. This technique uses the large-signal device circuit model to predict the external terminations necessary for maximum output power at a specified frequency. The next section describes the DR mounting configuration, the resulting equivalent circuit and the method by which it is incorporated into the synthesis procedure. Finally the method is used to design a 13.8 GHz DRO, using a NE71000 chip MESFET View full abstract»

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  • On the approximation of analog systems with digital filters

    Publication Year: 1989 , Page(s): 11 - 15
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    The problem of approximation of an analog system by means of a digital filter, as it arises in typical echo cancellation problems, is considered. In a first case, the input signal of the analog system originates from the input signal of the digital filter via D/A conversion as is the case of echo cancellation in full duplex data transmission. In the second case, the input signal of the digital filter originates from the input signal of the analog system via A/D conversion, as is the case of echo cancellation in long-distance telephone circuits View full abstract»

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  • An improved algorithm for border following of binary images

    Publication Year: 1989 , Page(s): 118 - 122
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    Border following techniques have been extensively studied, and have a wide variety of applications. These existing methods can satisfactorily find and trace outermost borders. However, it is shown that interior holes are often incorrectly traced or follow sub-optimal paths. The authors examine the reasons for this, and put forward a new method that overcomes these deficiencies. Only the case of binary 2D raster images is examined. However, since such images form the basis for the more complex image types, the techniques described can be readily extended to the more complex image forms View full abstract»

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  • The design of a 50 Mflop arithmetic chip for massively parallel pipelined DSP algorithms: the floating point pipeline CORDIC processor

    Publication Year: 1989 , Page(s): 410 - 414
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (416 KB)  

    The paper describes a high performance VLSI CORDIC arithmetic chip. It performs 15 106 rotations/sec (50 Mflops) and can be applied as a processing element in parallel/pipelined processor structures (systolic and wavefront arrays) for real time/high speed signal processing algorithms and matrix computation applications. The authors present a novel optimized (floating point) CORDIC algorithm, and architecture, its performance and layout. Algorithm, architecture, performance and layout are parametrized which allows automatic generation of the chip layout for any required chip performance, accuracy and dynamic range of arithmetic operations View full abstract»

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  • A new method supporting the nominal design of analog integrated circuits with regard to constraints

    Publication Year: 1989 , Page(s): 614 - 618
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (492 KB)  

    The essential feature of the presented method is the characteristic boundary curve (CBC), which represents the potential error reduction as a function of the parameter correction for one iteration step. The CBC in the unconstrained case has been described by Antreich et al. (1988) but most practical optimization problems include constraints. Therefore, this paper presents a definition of the CBC for problems with constraints and provides a new algorithm for the calculation of the CBC. This algorithm is more accurate and allows the calculation of the CBC for unconstrained problems as well as for constrained problems. A second new algorithm is also described. It calculates a point on the CBC corresponding to a given parameter correction norm. This new algorithm is faster, more accurate, and additionally deals with constraints. Another new property of the CBC is described: The CBC shows the influence of constraints on the optimization process. The algorithms presented in the paper have been implemented in the program system CANDI (Circuit level Analog Design system for Integrated circuits), which is now tested in several installations in industry View full abstract»

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  • Digitized analog network model for the simulation of thermal systems and processes. Application to the determination of thermal diffusivity of solid materials

    Publication Year: 1989 , Page(s): 575 - 579
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (372 KB)  

    Presents a simulation model based on passive resistance networks. It has been applied to thermal diffusivity determination of solid materials, especially thermoelectric semiconductors. The model has proved to be very useful for interpreting data obtained under unsuitable conditions from the point of view of the conventional technique based on Angstrom's method. It has also been possible to process it digitally thus allowing for a quick and simple treatment of experimental measurements. The simulation is versatile and permits the extension of the original method to cases where the sample shortness would not fit the required boundary conditions. The model validity and accuracy has been previously checked by comparing its results with values obtained from semi-infinite specimens View full abstract»

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  • An improved characterisation technique for amplifiers used in high-speed switched-capacitor circuits

    Publication Year: 1989 , Page(s): 309 - 314
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (372 KB)  

    This paper has described an improved characterisation method for transconductance amplifiers. A previous method was first reviewed, and it was shown that the failure of that method to take amplifier parasitics into consideration compromised the important objective of producing characterisation data independent of the amplifier embedding. The parameters needed in an improved characterisation method were then considered, and a new amplifier characterisation technique described with examples based on a single-stage cascade MESFET amplifier. It was shown that the results of the new characterisation could be applied to a wider range of circuits than its predecessor, since the data was completely independent of the test-circuit used to produce it. In particular, it was shown to apply equally to single- and dual-amplifier networks and should, in theory, be equally applicable to networks containing an arbitrary number of amplifiers. The accuracy and simplicity of the new technique make it attractive for use in the design of high-speed SC systems, where precise circuit optimisation is essential View full abstract»

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  • Realization of non finite extent quadratic digital filters

    Publication Year: 1989 , Page(s): 51 - 54
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (224 KB)  

    Presents efficient realization structures of nonfinite extent quadratic digital filters, which are described in a recursive form, using a matrix decomposition approach and exploiting the existing symmetries in the Volterra Kernels. In particular, using the LU decomposition the authors derive a modular structure with less computational and hardware requirements. It is expected, as in the linear case, that the nonfinite extent quadratic digital filters will be more efficient than their finite extent counterparts. The proposed realization structure may be considered as the basis for the implementation of the nonfinite extent quadratic digital filters by VLSO systolic and wavefront array processors View full abstract»

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  • Deep reasoning approach to sequential circuit fault diagnosis

    Publication Year: 1989 , Page(s): 665 - 669
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (504 KB)  

    The authors describe an algorithm for the location of faults in synchronous sequential circuits. It is based on the `deep reasoning' approach to circuit fault diagnosis. The application of the deep reasoning or `first principles' approach to circuit fault diagnosis has been shown to be an effective and powerful diagnosis technique when applied to combinational circuits. However, its application to sequential circuits has proved to be difficult and the candidate generation procedure has been reported to become indiscriminate when applied to this kind of circuit. The authors show how the deep reasoning approach to circuit fault diagnosis can be applied to synchronous sequential circuits by incorporating the circuit's output dependency on the present state of storage state devices into the diagnosis process. They achieve this by creating a combinational model of the sequential circuit with the feedback loops broken and by introducing probing points to measure state values. The application of the extended diagnosis procedure to the combinational model of a sequential circuit gives encouraging results View full abstract»

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  • Two-dimensional SC filters with circularly symmetric response

    Publication Year: 1989 , Page(s): 252 - 255
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (200 KB)  

    A modified gyrator capacitor network is used for 2D SC filter design. Filters with circularly symmetric response are used to illustrate the synthesis method. The obtained filters are parasitic insensitive, two-phase SC networks. In comparison with the design methods presented by Nishikawa et al. (1984) and Matsui et al. (1985) it is found that the 2D SC filters designed by analog network emulation are more effective with respect to the number of phases or opamps than those designed by digital filter emulation View full abstract»

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  • Time domain testing of large nonlinear circuits

    Publication Year: 1989 , Page(s): 390 - 394
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (400 KB)  

    This paper presents a new approach to analog and mixed mode testing based on a decomposition technique. Voltage measurements placed at the partition points are used to reduce the effect of a faulty element to a local area, thus facilitating the test. Limiting the effect of a fault to a local area allows the separation of digital and analog parts as their analyses do not have to be performed simultaneously. In the proposed testing technique measurements play an active role not only on the assessment of circuit functionality but on the circuit simulation as well. The authors present the description of their method for time domain testing. The method can be extended for the measurements of harmonic components of the periodic response. They discuss the nonlinear system equations and sensitivity approach, then introduce the decomposition approach. The test procedure of the proposed approach is given View full abstract»

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  • Hifi: an environment for the high level description and analysis of VLSI networks

    Publication Year: 1989 , Page(s): 629 - 633
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (456 KB)  

    A new environment is presented for the description and analysis of both synchronous and asynchronous VLSI networks at the top levels of abstraction. Its model is based on two powerful paradigms, the Applicative State Transition concept of Backus, for the functional aspects and the theory of single token Time Petri Nets, for the dynamic aspects of the model. These paradigms combined provide an elegant and effective framework for the high level description, simulation and compilation of VLSI networks. The Design Description Language of the model fully supports the description of parametrized designs through its object-oriented nature View full abstract»

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  • An integrated bit-serial 9-point median chip

    Publication Year: 1989 , Page(s): 339 - 343
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (368 KB)  

    An integrated 9-point median chip is designed and fabricated. The median operation is based on a recently proposed bit-serial searching algorithm. A standard 3μ double metal technology has been used. The main features of the chip are small size and relative high speed. It works up to 50MHz clock rate with chip size of only 1.15 mm2. A comparison is made between different VLSI architectures for the implementation of median filters. It turns out that the median filter based the proposed method is suitable for applications where many small median filters needed to be implemented on a single chip or applications where the window size is large View full abstract»

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  • MOSFET-capacitor continuous filter with composite operational amplifier

    Publication Year: 1989 , Page(s): 123 - 127
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (252 KB)  

    The authors describe the implementation of the concept of intensive composite operational amplifier (COA) filters, in MOSFET-C continuous-time filters. A general structure of a fully symmetric differential input-differential output COA (DCOA) is proposed. It can be easily realized in MOSFET technology and employed in a fully-balanced filter. The sensitivity analysis of such a filter employing one DCOA is provided. This leads to the conclusion that the range of working frequencies of a fully symmetric filter is twice as large as in the case of an unsymmetric one. An example of a MOSFET-C filter based on the Rauch prototype with one DCOA is discussed to illustrate some advantages of the approach proposed View full abstract»

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  • A new idea for speech waveform coding using vector quantization and solution to the matching problem in L-norm

    Publication Year: 1989 , Page(s): 522 - 526
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (292 KB)  

    A new idea for waveform coding using vector quantization (VQ) is introduced. This idea makes it possible to deal with codevectors much larger than before for a fixed bit per sample rate. Also a solution to the matching problem in the L-norm describing a measure of nearness is presented. The overall computational complexity of the solution is O(n3log2n). Sample results are presented to demonstrate the advantage of using this technique in the context of coding of speech waveforms View full abstract»

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  • Design of 2-D quadratic filters using their bi-impulse responses

    Publication Year: 1989 , Page(s): 415 - 419
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (416 KB)  

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