By Topic

Semiconductor Thermal Measurement and Management Symposium, 1994. SEMI-THERM X., Proceedings of 1994 IEEE/CPMT 10th

Date 1-3 Feb. 1994

Filter Results

Displaying Results 1 - 19 of 19
  • Proceedings of 1994 IEEE/CHMT 10th Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)

    Save to Project icon | Request Permissions | PDF file iconPDF (22 KB)  
    Freely Available from IEEE
  • Advanced micro air-cooling systems for high density packaging

    Page(s): 53 - 58
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (452 KB)  

    Future 3D electronics packaging systems will require micro cooling systems that can be integrated and permit the continued use of air as a coolant. To achieve this, new types of silicon micro heat exchangers were made using an anisotropic etching process. Various heat exchanger configurations and sizes were made using sandwich and stacking techniques. They can be used either as a heat exchanger for direct cooling with compressed air or as a heat pipe and thermosyphon for indirect cooling with fan-blown air. The performance characteristics of the various cooling systems are stated. The micro-heat-pipe can be used for power loss densities of up to 3 W/cm2, the direct air cooling up to 15 W/cm2 and the thermosyphon up to 25 W/cm2. Cooling performances are achieved that are otherwise only possible with liquid cooling. The practical application of the micro cooling system is demonstrated using the example of the Pentium processor. With a power loss of 15 W, the micro cooling system is able to limit the increase in operating temperature to 15 K. The volume of the micro heat exchanger is 2.5 cm3 and therefore considerably smaller than that of standard heat sinks View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Thermal enhancement of IC packages

    Page(s): 33 - 43
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (892 KB)  

    Plastic package thermal enhancement techniques that improve the heat dissipating capabilities of the packages are available to IC package design engineers. Evaluations of these techniques have been performed using test structure measurements and thermal FEA modeling. The techniques studied include the use of additional metal traces on the PCB to spread the heat away from the package, the use of heat slugs and heat spreaders inside the package to enhance heat transfer to the package leads and package body, and the use of high thermal conductivity mold compounds to improve thermal performance. Package types ranged from 8 pin SOIC's to 208 PQFP's with a broad range of chip sizes. Details of the measurement and modeling techniques are given with comparison of the models to the experimental results in many instances View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Liquid cooling performance for a 3-dimensional multichip module and miniature heat sink

    Page(s): 73 - 77
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    Measured thermal performance is presented for a single phase liquid-cooled module. Tape automated bonded (TAB) thermal test chips and their associated substrates are stacked in a compact, 3-dimensional liquid tight module. A dielectric liquid, polyalphaolefin (PAO) is forced to flow past the active and inactive sides of the TAB chips. At a volumetric flowrate of 0.05 gallons per minute (gpm) and an estimated pressure loss less than 0.5 psi. the measured junction-to-liquid thermal resistance is 2.0 C/W for a 0.50"×0.50"×0.015" thermal test chip. The thermal resistance was also measured for an indirect liquid cooling approach. PAO was used to cool a miniature sink mounted directly to a 0.50"×0.50" heat source. The heat source was used to simulate the thermal characteristics of a chip carrier package. Overall dimensions of the liquid heat sink measured 1.0"×1.0"×0.28". The measured junction-to-liquid thermal resistance is 0.52 C/W for a flowrate of 0.05 gpm. and for an estimated pressure loss less than 1.0 psi. Numerical computational techniques yielded results which were comparable to the measured thermal resistances for both the 3-dimensional module and the miniature heat sink. Enhanced thermal performance gained by introducing micro encapsulated phase change material to the PAO is estimated for both the 3-dimensional module and the miniature heat sink View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Microelectronics cooling and SEMI-THERM: a look back

    Page(s): 1 - 16
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1416 KB)  

    For the occasion of the 10th anniversary of the SEMI-THERM conference, this paper provides a look back at some of the developments that have taken place since its founding. Topics covered include thermal measurement, thermal characterization, thermal analysis and modeling, air cooling, water cooling, and immersion cooling View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A study on the evaporation heat transfer in the cooling of high power electronics

    Page(s): 114 - 120
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (576 KB)  

    The cooling of a high power motor controller has been studied for more than two years. The total power dissipation in the controller is estimated to be in the order of 20 kW. We chose to use pool boiling inside a enclosed volume for thermal management. This paper is concerned with the evaporation part of the cooling system. The primary concern has been the cooling of the “hockey puk” GTO's having an expected power dissipation in the order of 1 kW. To increase the effective area for evaporation heat transfer, the components have been clamped between cooling “blocks”. We found however that a notable part of the heat was transferred directly from the GTO capsule itself into the liquid. This was dependent on the degree of liquid subcooling and the total pressure. The thermal resistance in the cooling blocks contributed significantly to the total temperature loss. The temperature gradients depended heavily upon the local heat transfer from cooling block to liquid. FEM simulations have been used to model the temperature distribution in the cooling blocks as a function of heat transfer coefficients View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Evaluation of alternative cooling techniques for TAB packages

    Page(s): 96 - 102
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (392 KB)  

    Cooling chip on board (COB) using TAB technology is sometimes tricky. Thermal vias with cooling copper planes are often used. This design may not be adequate when cooling high powered chips, therefore alternative designs will need to be investigated. In doing so it is necessary that performances be properly predicted especially when operating conditions are expected to be close to design limits. This study evaluates three cooling designs and three analytical methods of predicting the thermal performances of each design. The three designs are: 1. thermal vias connected to a cooling ground plane; 2. thermal vias connected to a cooling ground plane and a heatsink attached to the back side of the vias; and 3. a copper slug with a heatsink attached to the back side. The three methods of prediction are: 1. a one dimensional analysis; 2. a numerical analysis using FLOTHERM thermal and fluid analysis software; and 3. experimental analysis View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Studies on the use of radial jet reattachment nozzles as active heat sinks for electronic component boards

    Page(s): 64 - 72
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (476 KB)  

    Thermal management of high power electronic components (chips) with dissipation ratings of over 2-3 W/cm2 clearly demands non-traditional means to be successful. Many different approaches have been attempted in the past with varying degrees of success. In the last 8 years radial jet reattachment (RJR) has been proven in the laboratory to be a novel and effective mechanism for high surface heat removal rates with negligible downward force as compared with the commonly-used impinging open jets or in-line-jets. We propose in this report the use of these nozzles, either singly or in a array to cool PCB's from the top or from the bottom. Two typical arrangements for radial nozzle applications are fully discussed here in view of surface pressure and heat transfer characteristics. The discussion is supplemented with experimental work carried out at IIT to provide needed data. Our investigation indicates that high heat transfer rates are indeed achieved using radial nozzles. In general, RJR nozzles produce highest heat transfer rates when placed very close to a surface and for a wider area than for ILJ nozzles, with negligible downward (positive) forces. Typical maximum heat transfer coefficients are for gases, 300-500 W/m 2-K, and, although the experiments were performed with air, for liquids (no evaporation) the values (based on experimental Stanton numbers) range between 10000 to 50000 W/m2-K, depending on the fluid View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Transient thermal model for the MQUAD microelectronic package

    Page(s): 86 - 95
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (616 KB)  

    The MQUAD microelectronic package was developed to provide a high level of thermal performance for high leadcount integrated circuits.1 A numerical, lumped-parameter transient thermal model has been developed which accurately predicts the temperature of the die and other components of an MQUAD package in situations in which the power to the die changes. Examples of such situations are the power-up and power-down cycles and power excursions. The model is used to predict the behavior of a 160 lead, cavity-down MQUAD package in these situations under conditions of low and high circuit board conductivity and natural and forced convection. The predictions of the model are shown to be in good agreement with experimental values for representative situations View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Effect of circuit board parameters on thermal performance of electronic components in natural convection cooling

    Page(s): 32, 163 - 169
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (408 KB)  

    Natural convection is the most desirable cooling mechanism for electronic enclosures. Limited cooling capacity with natural convection requires identification and optimization of parameters impacting cooling. A set of such parameters is circuit pack layout and board conductivity (circuit board parameters). Hence, experimental and numerical simulations were undertaken to investigate the impact of these parameters on thermal performance of an electronic component in circuit pack setting. Component thermal performance was characterized by its junction to ambient thermal resistance (Rja), where room ambient was used as the reference temperature. The numerical model was verified against the experimental data with 4 percent agreement between the two analyses. The numerical model was then expanded to include the circuit board parameters. The effects of the spacing and height of the neighboring components, and board conductivity on thermal resistance were investigated. The model consisted of an array of nine components (3×3), with the center component as the focus of the study. Three values for board conductivity, component spacing and neighboring component height were considered. The data showed that increasing kboard three folds resulted in 17 percent reduction in Rja. Similarly, a three fold increase in component spacing reduced the Rja by 24 percent. It is deduced that the least junction to ambient thermal resistance was attained when component spacing was 0.023 m (900 mils) and board conductivity was 13.6 W/m°K View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • GaAs MMIC thermal modeling for channel temperatures in accelerated life test fixtures and microwave modules

    Page(s): 121 - 128
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1008 KB)  

    Detailed thermal modeling of a gallium arsenide (GaAs) power amplifier monolithic microwave integrated circuit (MMIC) yields operating channel temperatures that are used to correlate reliability life test results. The model includes temperature dependent material properties, surface metallization layers, and volumetric heat generation in the depletion region directly beneath the channels. Also included are chip-to-substrate and substrate-to-housing interface thermal resistances. Model predictions which include the top surface metallization layers indicate the hottest channel is not always the center channel as simpler methods would predict but in a location with partially unplated metallization. The finite difference meshing scheme is first verified by comparison to a simplified geometry that may be characterized by an analytical solution program. After the channel temperatures are established over a range of temperatures, model verification is accomplished by infrared (IR) imaging. The necessity of coating the GaAs MMIC with a uniform emissivity material to obtain accurate IR imaging results is demonstrated. A final confirmation of the techniques is by photographs taken during failure analysis indicating device failures occurred at the location predicted by the thermal model View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Thermal management of silicon-based multichip modules

    Page(s): 59 - 63
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    Thermal characteristics of silicon-based multichip modules and their associated heat sinks are presented. The structure of the multichip modules allows the heat generated inside a chip to be conducted away to the heat sink through the solder balls between the chips and the silicon substrate. The internal thermal resistances thus depend on the number of solder balls as well as the number of layers of insulators on the chip and the substrate. A thermal test module which has dimensions 59×59 mm mounted with nine thermal chips has been tested. The module can dissipate about 43 W at a chip temperature rise of 60°C when a heat sink with fin height of 25 mm is used at 1 m/s airflow. The heat sink has seven doubly folded fins which are thermally optimized to give the best cooling performance while keeping the lowest pressure drop across the heat sink at a given airflow rate View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Experimental determination of the effect of printed circuit card conductivity on the thermal performance of surface mount electronic packages

    Page(s): 44 - 52
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB)  

    Surface mount electronic packages, typically a few millimeters thick, are mounted directly and very close to printed circuit cards. Due to close proximity to the card, the overall thermal performance of the package depends on the thermal conductivity of the circuit cards. For characterizing the thermal performance of surface mount packages, SEMI Specification G42-88 specifies a FR4 card with one layer of circuitry in a fan-out pattern on the package side. To determine the effect of the circuit card conductivity on the thermal performance of surface mount packages, tests were done with a number of different types of packages on two types of cards. The packages were all 28 mm 208-leaded EIAJ/JEDEC type plastic with copper and alloy 42 leadframes, plastic with exposed heat spreader, and metal quad flat packs. One of the test card designs was similar to SEMI Specification card, with only one layer of circuitry in a fan-out pattern on the package side. The other card had two internal copper planes in addition to the fan-out pattern of circuitry on the package side. This paper describes the experimental procedure and discusses the thermal performance of these various surface mount packages on these two types of cards. The data shows that the thermal performance of plastic packages with alloy 42 leadframe is relatively insensitive to the amount of copper in the circuit card. On the other hand, the thermal performance of metal packages shows the most dependence on the amount of copper in the circuit cards View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Thermal performance of an elliptical pin fin heat sink

    Page(s): 24 - 31
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (572 KB)  

    Comparative thermal tests have been carried out using, aluminum heat sinks made with extruded fin, cross-cut rectangular pins, and elliptical shaped pins in low air flow environments. The elliptical pin heat sink was designed to minimize the pressure loss across the heat sink by reducing the vortex effects and to enhance the thermal performance by maintaining large exposed surface area available for heat transfer. The performance of the elliptical pin heat sink was compared with those of extruded straight and crosscut fin heat sinks, all designed for an ASIC chip. The results of the straight fin were also compared with those obtained by using Sauna, a commercially available heat sink modeling program developed based on empirical expressions. In addition to the thermal measurements, the effect of air flow bypass characteristics in open duct configuration was investigated. As expected, the straight fin experienced the lowest amount of flow bypass over the heat sink. For this particular application, where the heat source is localized at the center of the heat sink base plate, the overall thermal resistance of the straight fin was lower than the other two designs mainly due to the combined effect of enhanced lateral conduction along the fins and the lower flow bypass characteristics View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Analysis of thermal transient data with synthesized dynamic models for semiconductor devices

    Page(s): 78 - 85
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (620 KB)  

    A technique for synthesizing dynamic models comprised of discrete thermal resistances and capacitances directly from thermal step-response data on packaged semiconductor devices has been developed. Such models reveal the effective internal-package thermal resistances which comprise the overall junction-to-ambient or junction-to-case thermal resistance. These models can discriminate lumped internal constituent resistances including die/die-attachment spreading, internal package spreading, and case-to-air dissipation. The thermal step-response has been experimentally and analytically studied using the electrical method of junction temperature measurement. The interpretation and accuracy of these synthetic models have been investigated on a collection of test-case devices. Overshoot anomalies exhibited by junction-to-case thermal step responses have been examined experimentally and explained with synthetic model analysis. The application of synthetic models to computing thermal impedance for non-constant or cyclic device-powering conditions is also presented View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An exact solution of the steady-state surface temperature for a general multilayer structure

    Page(s): 129 - 137
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (604 KB)  

    A recursion relation technique has been used in the past to determine the surface potential from the multilayer electrical Laplace equation. This has provided for a vastly simplified evaluation of the electrical spreading resistance and four-probe resistance. The isomorphism of the multilayer Laplace equation and the multilayer steady-state heat flow equation suggests the possibility of developing a recursion relation applicable to the multilayer thermal problem. This recursive technique is developed and is shown to provide the surface temperature of the multilayer steady-state heat flow equation. For the three-layer ease, the thermal recursion relation readily yields the surface results which are identical with those presented by Kokkas (1974) and the TXYZ thermal code. This recursive technique can be used with any number of layers while incurring only a small increase in computation time for each added layer. For the case of complete, uniform top surface coverage by a heat source, the technique gives rise to the generalized one-dimensional thermal resistance result. An example of the use of the new recursive method is provided by the preliminary calculations of the surface temperature of a buried oxide (SOI, SIMOX) structure containing several thicknesses of the surface silicon layers. This new technique should prove useful in the investigation and understanding of the steady-state thermal response of modern multilayer microelectronic structures View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A model for thermal fatigue of large area adhesive joints between materials with dissimilar thermal expansion

    Page(s): 138 - 141
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (336 KB)  

    A model describing thermal fatigue of large area adhesive joints such as die bonds, has been developed. It is based on equations for crack growth rate and stress distribution in large area joints. The basic assumption of the model is that cracks grow from the edges of the area towards the center. The thermal resistance of the bond layer was calculated by assuming the cracked part of the layer had infinite thermal resistance. The thermal resistance as a function of the number of thermal cycles was predicted to be different for adhesives with low and high modulus of elasticity. Good agreement with previously reported experiments was obtained. The thermal resistance in silver filled die bond adhesives as a function of the number of thermal cycles was measured in these experiments View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An effective alternative for marginal thermal improvements of semiconductor devices

    Page(s): 103 - 113
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (920 KB)  

    Using a variety of surface mount packages, this paper reports the results of using various different methods for improving semiconductor thermal performance. Starting off with a 64-lead Quad Flat Package (QFP), data are presented for several different thermal environment conditions and for several different package variations. The environmental conditions include still-air, heat sink and tape sink. The package variations studied include die attachment thickness, internal drop-in heat spreader, and encapsulant material variations. Data are also presented for two die-on-copper-slug packages (100-lead QFP and 44-lead PLCC) and for a standard (not thermally enhanced) package (56-lead SSOP), under still-air, moving-air, heat sink and tape sink environments View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Thermal performance of air-cooled hybrid heat sinks for a low velocity environment

    Page(s): 17 - 22
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (388 KB)  

    Experimental procedures were used to compare thermal performance characteristics for similar shaped air-cooled heat sinks manufactured from metallic and non-metallic materials. The heat sink geometry was designed and optimized with the intent of cooling a single die which is dissipating 100 watts in a desktop, workstation environment. One of the heat sinks was fabricated by bonding a copper base to a machined, graphite fin structure which has a uni-directional thermal conductivity of 800 W/m C. At 183 air velocity of 150 linear feet per minute (lfm) and an estimated pressure loss of less than 0.039 inches of water, the measured sink-to-air thermal resistance was 0.53 C/W for this copper/graphite hybrid design. Measured junction-to-sink thermal resistances were less than 0.20 C/W when a commercially available land grid array package was used to directly attach a copper heat sink to a 0.50"×0.50"×0.015" thermal test chip. Measured heat sink thermal resistances were in relatively good agreement with predicted heat sink resistance values for sea level atmospheric conditions. A modeling simplification technique is presented which allows the numerical computational time to be reduced by at least 50 percent for heat sink optimization studies. Numerical computational techniques were used to estimate the effect of reduced air density on heat sink performance for high altitude, low air velocity environmental conditions View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.