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2005 6th International Conference on ASIC

24-27 Oct. 2005

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  • [Cover]

    Publication Year: 2005, Page(s): C1
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  • 2005 6th International Conference on ASIC Proceedings

    Publication Year: 2005, Page(s): nil2
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  • Copyright page

    Publication Year: 2005, Page(s): nil3
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  • Table of contents

    Publication Year: 2005, Page(s): I
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  • Conference committee

    Publication Year: 2005, Page(s):II - V
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  • Welcome to ASICON 2005

    Publication Year: 2005, Page(s): VI
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  • Keynote Speech (K-1) Opportunity and challenge for IC development in mainland of China

    Publication Year: 2005, Page(s):VII - X
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1816 KB) | HTML iconHTML

    Provides an abstract of the keynote presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings. View full abstract»

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  • Keynote Speech (K-2) Design Automation in the "Late-CMOS" Age

    Publication Year: 2005, Page(s): XI
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (291 KB)

    Within the next 15 years, we will reach the end of Silicon based CMOS design. This talk will outline some of the challenges and opportunities presented as technology scales from 65nm today down to 22nm in this timeframe. New EDA technology requirements in the areas of Modeling, Synthesis, Functional Verification, and Reliability will be reviewed and some solutions proposed. View full abstract»

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  • Keynote Speech (K-3) The Secret Analog Revolution

    Publication Year: 2005, Page(s):XII - XIII
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (787 KB) | HTML iconHTML

    Provides an abstract of the keynote presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings. View full abstract»

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  • Keynote Speech (K-4) ASICs in a Global Economy; The Industrialization of the Semiconductor Industry

    Publication Year: 2005, Page(s): XIV
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB) | HTML iconHTML

    Provides an abstract of the keynote presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings. View full abstract»

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  • Tutorial Session Index

    Publication Year: 2005, Page(s):XV - XXXIV
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  • Author's index

    Publication Year: 2005, Page(s):i - x
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  • A ow-Phase- oise CMOS Ring Oscillator with ifferential Control

    Publication Year: 2005, Page(s):540 - 543
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1044 KB) | HTML iconHTML

    A 900-MHz two-stage CMOS voltage controlled ring oscillator (VCRO) with differential control is presented. The circuit is designed in a 0.18-mum CMOS technology and operated on a 1.8-V supply voltage. The VCRO has a tuning range of 350 MHz to 1020 MHz. At 900 MHz, the phase noise of the VCRO is -109.2 dBc/Hz at 600-KHz frequency offset with power consumption of 43.7 mW View full abstract»

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  • A fully integrated 1.2-GHz CMOS phase-locked loop

    Publication Year: 2005, Page(s):525 - 528
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (934 KB) | HTML iconHTML

    A 1.2GHz phase-locked loop (PLL) is designed in a 0.18mum 3.3V 1P6M CMOS RF technology. The PLL consists of a LC-tank circuit, prescaler, frequency divider, frequency/phase detector, charge pump that includes a bandgap current reference and a passive loop filter. The passive loop filter is also on-chip and no off-chip components are needed View full abstract»

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  • A curvature-compensated bandgap reference with improved PSRR

    Publication Year: 2005, Page(s):529 - 533
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (951 KB) | HTML iconHTML

    A curvature-compensated current mode bandgap reference with improved PSRR is presented. The circuit takes advantage of a simplified straightforward implementation of the curvature compensation method, the reference achieves a temperature coefficient of 7ppm/ degC over the temperature range of -20degC to +80 degC. And by using negative feedback to generate a regulated supply, the power supply rejec... View full abstract»

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  • A low-voltage low-power CMOS sample-and-hold circuit

    Publication Year: 2005, Page(s):534 - 538
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (525 KB) | HTML iconHTML

    A low power supply sample-and-hold circuit for a pipelined analog-to-digital converter is described. Several approaches have been used to reduce the power consumption, including a gain-compensated structure and a simple optimum allocation of settling time parameter. To reduce the nonlinear error of the sampling switch, a signal dependent clock bootstrapping system is used. Simulation results demon... View full abstract»

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  • A low noise CMOS wideband PLL with a new AAC LC-VCO

    Publication Year: 2005, Page(s):539 - 543
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1447 KB) | HTML iconHTML

    This paper presents a wideband CMOS PLL frequency synthesizer with a new AAC (auto-amplitude control) VCO in 0.35mum CMOS process. To get wideband VCO frequency output in relatively low RF band (400MHz~660MHz), an off-chip LC tank with a high voltage varactor is used. The new AAC module is designed to keep the output amplitude constant, hence relatively good performance. The proposed PLL is made u... View full abstract»

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  • A high-accuracy BiCMOS constant current charge circuit

    Publication Year: 2005, Page(s):544 - 548
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1299 KB) | HTML iconHTML

    A BiCMOS constant current circuit applied to charge management ASIC is presented in this paper. The circuit has advantages with respect to wide range in operation voltage, high accuracy in trickle current and constant current, conveniences in adjust. Moreover, the current sensing resistor connecting, which consists of high-side current sensing and low-side current sensing, is concerned. The integr... View full abstract»

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  • A novel digital soft-start circuit for DC-DC switching regulator

    Publication Year: 2005, Page(s):554 - 558
    Cited by:  Papers (5)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB) | HTML iconHTML

    A new CMOS-compatible digital soft-start circuit for DC-DC switching regulator is presented in this paper, for which the technical is adopted to eliminate the inrush current and avoid the overshoot of the output voltage. It's fully integrated on chip, so that the external soft-start capacitor is not in need, which leads to the reduction of the required board space and component cost. Hspice simula... View full abstract»

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  • A low quiescent current and reset time adjustable power-on reset circuit

    Publication Year: 2005, Page(s):559 - 562
    Cited by:  Papers (2)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (932 KB) | HTML iconHTML

    Based on the power-up/power-down control, the paper describes a low quiescent current and reset time adjustable power-on reset (POR) circuit, which is integrated in a regulator. Compared with the conventional RC reset circuit, it can provide more accurate reset pulse at slow power up and twinkling power down. And when the chip works properly, parts of the power-on reset circuit are shut down, then... View full abstract»

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  • A novel design of supply voltage selector

    Publication Year: 2005, Page(s):564 - 567
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (482 KB) | HTML iconHTML

    This paper presents a design of supply voltage selector. A hysteretic comparator senses a voltage difference between the two supply voltages, and the voltage selector selects a right supply voltage for the multisupply chip system. The hysteretic comparator is slightly subject to the variation of the supply voltage and temperature. This circuit is designed on the base of BICMOS process, and its per... View full abstract»

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  • The design of a novel feedforward control circuit for DC-DC converter

    Publication Year: 2005, Page(s):568 - 572
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (424 KB) | HTML iconHTML

    A feedforward control circuit for DC-DC converter is presented. The circuit can quickly regulate the output voltage Vout against the changes in the input voltage Vin by changing the slope of ramp signal. It can approach a steady-state value in a shorter timescale when compared with conventional approaches. Finally, the simulation result is given. View full abstract»

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  • Pulsed multilevel current drive circuitry with LDMOS for monolithic deformable mirror

    Publication Year: 2005, Page(s):573 - 577
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    The electrostatic capacitive microactuator has a critical minimum gap due to potential pull-in and tip-in phenomena. Since constant charge drive permits more stable operation range than constant voltage drive, current drive based on charge drive is attractive owing to its good controllability. Due to quasistatic precondition, a method of pulsed multilevel current drive is adopted to boost the refr... View full abstract»

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  • An improved charge pump with high efficiency for low voltage operations

    Publication Year: 2005, Page(s):578 - 581
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (601 KB) | HTML iconHTML

    This paper proposes a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. With the switching substrate technique and boosted transistor, the influence of body effect is almost eliminated and the voltage gain at each pumping node is greatly increased. So higher output voltage and higher efficiency than the conventional charge pump can be obta... View full abstract»

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  • A fully integrated 0.18-μm CMOS low noise amplifier for 2.4-GHz applications

    Publication Year: 2005, Page(s):582 - 586
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (952 KB) | HTML iconHTML

    A low noise amplifier (LNA) with good linearity and low noise figure has been designed by 0.18μm CMOS technology for 2.4GHz applications. The amplifier provides IIP3 of 11.8dBm and input -1dB compression point (CP) of -13.5dBm with a noise figure equal to 2.77dB, and has a forward gain of 4.5dB and power dissipation of 18mW using 1.8V supply. View full abstract»

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