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2005 International Conference on Microelectronics

Date 13-15 Dec. 2005

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Displaying Results 1 - 25 of 92
  • [Cover]

    Publication Year: 2005, Page(s): C1
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  • Proceedings. The 17th ICM 2005. 2005 International Conference on Microelectronics (IEEE Cat. No.05EX1112C)

    Publication Year: 2005
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  • Copyright page

    Publication Year: 2005, Page(s): iv
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  • Table of contents

    Publication Year: 2005, Page(s):v - x
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  • Other messages

    Publication Year: 2005, Page(s): xi
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  • Conference committee

    Publication Year: 2005, Page(s): xii
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  • Conference committee

    Publication Year: 2005, Page(s): xiii
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  • [Breaker page]

    Publication Year: 2005, Page(s): xv
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  • Fiber-Optic Sensing Systems: Fiber-Bragg Grating Sensor and Swept Laser Interrogation Platform

    Publication Year: 2005, Page(s):xvi - xvii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB) | HTML iconHTML

    • Introduction to Fiber-Optic Sensing • Focus on Fiber Bragg Grating Sensors • Sensor Interrogation Systems • Applications and Field Studies This presentation will focus on key technology components in a Fiber Bragg Grating (FBG) sensing system, including sensor design and construction, interrogation techniques, system integration, and data processing. Fiber Bragg Grating (... View full abstract»

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  • 3D TCAD Simulation of nanoscale Multi-Gate FETs (MuGFETs)

    Publication Year: 2005, Page(s): xviii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB) | HTML iconHTML

    Aggressive scaling of bulk MOS device dimensions has been the major contributor driving improvements in integrated circuit performance. Due to limitations on gate oxide thickness, and source/drain junction depth, further scaling of MOSFET devices in the sub-50 nm process generation will be difficult, if not impossible. New device architecture and new material combinations are therefore needed to o... View full abstract»

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  • The Quest for Reliable Nano Computations

    Publication Year: 2005, Page(s): xix
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB)

    In this presentation, we explore the feasibility of designing reliable nano-architectures using practical (i.e. very small = "less than 10") redundancy factors. To this end, we begin with a thorough review of redundant design strategies for fault-tolerant nano-architectures. We then adapt three redundant design strategies -- modular redundancy, von Neumann multiplexing, and reconfigurability -- to... View full abstract»

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  • Monolithic Microwave Integrated Circuit

    Publication Year: 2005, Page(s): xx
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (112 KB)

    Monolithic microwave integrated circuits (MMIC) are now part of most modern radars, communication systems and hand held devices, and current trends show that this technology will continue to play an important role in radar and communication systems in the foreseeable future. In monolithic microwave integrated circuits, microwave circuit design techniques are used to realize amplifiers, oscillators... View full abstract»

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  • Reconfigurable SOC Platforms

    Publication Year: 2005, Page(s): xxi
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (96 KB) | HTML iconHTML

    Reconfigurable VLSI platforms in the form of Field Programmable Gate Arrays have given a fresh impetus to the system-on-chip paradigm. New and exciting directions in VLSI design in the form of Hardware/Software co-design, on-the-fly configurable CPU cores and scalable architectures for complex multimedia applications have all started to appear. This talk will provide an overview of the recent adva... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s): 1
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  • An Elaborate Design and Optimization of Low Order Bandpass Sigma-Delta Modulator

    Publication Year: 2005, Page(s):2 - 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB) | HTML iconHTML

    This paper presents an elaborate plan and optimization method for designing and implementing low-order band pass digital sigma-delta modulator with high order output dynamic range (DR). The noise suppression in the pass band region of the modulator and high order output DR would be achieved by designing and optimizing the Noise Transfer Function (NTF) based on over sampling ratio (OSR) and desired... View full abstract»

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  • A CMOS Fully Differential Σ - Δ A Frequency Synthesizer for 2-Mb/s GMSK Modulation

    Publication Year: 2005, Page(s):6 - 9
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2866 KB) | HTML iconHTML

    A CMOS fully-differential 2.4-GHz Σ-Δ frequency synthesizer for Gaussian Minimum Shift Keying (GMSK) modulation is presented in this paper. The pre-compensation fractional-N PLL is adopted in the modulator. The designed circuits are simulated in a 0.18μm 1P6M CMOS process. The power consumption of the PLL is about 11-mW and the data rate of the modulator can get to 2-Mbits/s. View full abstract»

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  • A CMOS Voltage Reference Based on Threshold Voltage for Ultra Low-Voltage and Ultra Low-Power

    Publication Year: 2005, Page(s):10 - 12
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (720 KB) | HTML iconHTML

    This work describes a CMOS voltage reference using only resistors and transistors working in weak inversion, without any bipolar transistors. The circuit operation is similar to bandgap references, but the voltage reference is given by the threshold voltage of an nMOS transistor. The circuit was implemented in a standard 0.35μm TSMC CMOS process. The circuit generates a reference of 514mV for... View full abstract»

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  • An Efficient Forward Biasing Body Bias Generator for Clock Delayed Domino Logic

    Publication Year: 2005, Page(s):13 - 18
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1624 KB) | HTML iconHTML

    A technique for improving domino logic is to use a variable threshold voltage keeper (VTVK), so that the keeper size may be increased to improve the noise-immunity without significantly increasing the power and the delay. In this work, a novel body bias generator with forward biasing capability is proposed for the VTVK scheme. Forward biasing the keeper source-body junction allows its threshold vo... View full abstract»

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  • Guide line for standard CMOS traveling wave amplifier design

    Publication Year: 2005
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2304 KB) | HTML iconHTML

    Design of traveling wave amplifier (TWA) in 0.13μm standard CMOS technology is presented. Modelling of 80 Ω coplanar wave guide used to synthesize inductors TWA's lines is presented. Asymmetric cascode, CPW and losses compensation technique allow to maximize the TWA amplifier bandwidth. Simulations with design kit and developed models for CPW show a 52 GHz bandwidth with a maximum power g... View full abstract»

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  • Design of Low-Voltage MOSFET-Only Switched-Capacitor Filters

    Publication Year: 2005, Page(s):24 - 29
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2072 KB) | HTML iconHTML

    A 1.8-V switched-capacitor (SC) and a 1-V switched-opamp (SO) filter in standard digital CMOS technology is presented. The filters use substrate-biased MOSFETs in depletion region as capacitors linearized by parallel compensation technique. The simulation results confirm the capability of compensated depletion-mode MOS capacitors to fulfill analog circuit requirements at low supply voltages. A nov... View full abstract»

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  • High Speed Low Gate Leakage Large Capacitive-Load Driver Circuits for Low-Voltage CMOS

    Publication Year: 2005, Page(s):30 - 35
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1232 KB) | HTML iconHTML

    In this work, a high-speed full swing driver for large capacitive-loads for low-voltage CMOS applications is presented. The driver which has multi-path for driving the load has a low gate leakage. It works similar to a standard CMOS gate and can be implemented in any CMOS fabrication technology. The circuit does not use extra bootstrap capacitors, has a small effective input capacitance, and can o... View full abstract»

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  • Compressed ROM High Speed Direct Digital Frequency Synthesizer Architecture

    Publication Year: 2005, Page(s):36 - 39
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1208 KB) | HTML iconHTML

    A low-power, high speed direct digital frequency synthesizer (DDFS) is presented. Some approximations are used to avoid using a large ROM look-up table to store the sine values in a conventional DDFS. Significant saving in power consumption, due to the compressed ROM, renders the design more suitable for portable wireless communication applications. To demonstrate the proposed technique, a DDFS ha... View full abstract»

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  • Design of a two stage Low Noise Amplifier at Ku Band

    Publication Year: 2005, Page(s):40 - 45
    Cited by:  Papers (4)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3928 KB) | HTML iconHTML

    Designing a Low Noise amplifier (LNA) at Ku band requires a lot of concerns to be taken care of. Circuits at this high frequency deviate from their normal behavior and are not very easy to implement. We have designed and implemented a LNA at 16 GHz and different issues regarding simulations and implementation have been discussed. The design specifications for this amplifier were not very demanding... View full abstract»

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  • Impact of high DC bias on RF LDMOS reliability for radar application

    Publication Year: 2005, Page(s):46 - 49
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2456 KB) | HTML iconHTML

    The reliability of power RF LDMOS submitted to RF and DC accelerated tests under high temperature has been investigated by DC and dynamic electrical characterization. After DC and RF ageing, some electrical parameters changed, with a significant drift of the feedback capacitance (CRS). In order to explain qualitatively electrical parameter shifts, a 2D RF LDMOS structure was implemented... View full abstract»

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  • A low power, high SFDR, ROM-less direct digital frequency synthesizer

    Publication Year: 2005
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1688 KB) | HTML iconHTML

    This paper describes the design of a ROM-less direct digital frequency synthesizer. The spurious free dynamic range (SFDR) of the proposed DDFS system is -91.51dBc. A DDFS IC has been designed in HP 0.5μm standard N-Well CMOS process technology, and that's layout has 2.489mm2 area. A 32-bit frequency control word gives a tuning resolution of 0.023Hz at 100MHz sampling rate. This DDFS... View full abstract»

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