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Emerging Technologies: Circuits and Systems for 4G Mobile Wireless Communications, 2005. ETW '05. 2005 IEEE 7th CAS Symposium on

Date 23-24 June 2005

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  • ETW '05. The 7th IEEE Emerging Technologies Workshop: Circuits and Systems For 4G Mobile Wireless Communications (IEEE Cat. No.05EX1013)

    Publication Year: 2005
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  • Copyright page

    Publication Year: 2005 , Page(s): 2
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  • Staff/Society listings

    Publication Year: 2005 , Page(s): 4
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  • Program message

    Publication Year: 2005 , Page(s): 5
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  • Table of contents

    Publication Year: 2005 , Page(s): 6 - 7
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  • Signal processing and wireless networks

    Publication Year: 2005
    Cited by:  Papers (1)
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    Summary form only given. A major issue in today's wireless world is the dramatic increase in demand for new capacity and higher performance of wireless networks. The development of these capabilities is limited severely by the scarcity of two of the principal resources in wireless networks, namely energy and bandwidth. Consequently, the community has turned to a third principal resource, the addition of intelligence throughout the network, in order to exploit increases in processing power afforded by Moore's law type improvements in microelectronics. This talk focuses on two aspects of this phenomenon: the effects of advanced node-level signal processing on the higher-layer performance of wireless communication networks, including energy efficiency, spectral efficiency, throughput and delay; and the use of advanced signal processing principles, including collaborative beam-forming, sensor scheduling, and distributed learning, in the design, deployment and operation of wireless sensor networks. View full abstract»

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  • Adaptive input-power processing for mitigation of PAPR in OFDM

    Publication Year: 2005 , Page(s): 9 - 12
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (224 KB) |  | HTML iconHTML  

    The high peak-to-average-power ratio (PAPR) in orthogonal frequency division multiplexing (OFDM) greatly limits the high power amplifier (HPA) power efficiency. Different from other approaches to PAPR mitigation, the approach in this paper presents a simple new scheme which employs adaptive input power processing to reduce the instantaneous power fluctuation of OFDM signals. Specifically, at the transmitter side, the segments of the OFDM signal with high power are pushed down and the ones with low power are pulled up by adaptive adjustment of input power. As a consequence, the PAPR is greatly mitigated. These results are confirmed by computer simulations. View full abstract»

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  • Reconfigurable front-end architectures and A/D converters for flexible wireless transceivers for 4G radios

    Publication Year: 2005 , Page(s): 13 - 18
    Cited by:  Papers (13)  |  Patents (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (304 KB) |  | HTML iconHTML  

    Flexibility is a key feature in 4G telecom systems, where there is a demand for reconfigurable transceivers that can cope with multiple standards (cellular, WLAN, Bluetooth, etc.). Additionally, these transceivers should adapt to the environment (presence of received blockers or not, status of battery power levels, etc.) to minimize power consumption and optimize performance according to the needs of the customer and the desired quality of service. In addition, flexibility is required to cut the development time and cost to implement a new future standard into the 4G system. All this calls for a digitally controlled front-end architecture ("software-defined radio") with reconfigurable RF and analog baseband blocks controlled through digital programmable software. This poses serious challenges to the design of such reconfigurable yet power-efficient RF/analog blocks. For the analog-to-digital converters in the receiver, this comes down to designing a power- and area-efficient reconfigurable converter with variable bandwidth and dynamic range. The general requirements for such converters in 4G systems is described. This is then illustrated with the design of a reconfigurable continuous-time ΔΣA/D converter with a pipelined multi-bit quantizer and 1-bit feedback. The chip has been realized in a 0.18 μm CMOS technology. It has 3 different modes (20 MHz BW/58 dB SNDR, 4 MHz BW/60 dB SNDR, 0.2 MHz BW/70 dB SNDR). The chip has an active area of 0.9 mm2 and the power consumption for the most demanding mode (20 MHz/58 dB) is 37 mW. View full abstract»

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  • Wireless sensor networks: a new communication paradigm

    Publication Year: 2005
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (64 KB)  

    Summary form only given. Computers, communication, and sensing technologies are converging to change the way we live, interact, and conduct business. Wireless sensor networks reflect such convergence. These networks are based on collaborative efforts of a large number of sensor nodes. They should be low-cost, low-power, and multifunction. These nodes have the capabilities of sensing, data processing, and communicating. Sensor networks have wide range of applications, from monitoring sensors in industrial facilities to control and management of energy applications to military and security fields. Because of the special features of these networks, new network technologies are needed for cost effective, low power, and reliable communication. These network protocols and architectures should take into consideration the special features of sensor networks such as: the large number of nodes, their failure rate, limited power, etc. In this talk the impact of wireless sensor networks is addressed, several of the design and communication issues is discussed, and a case study of a current project of using such networks in drilling and management off-shore oil is given. View full abstract»

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  • The algorithm to optimize allocation and utilization of frequency spectrum for wireless access systems

    Publication Year: 2005 , Page(s): 20 - 23
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (160 KB) |  | HTML iconHTML  

    This paper presents the algorithm to optimize allocation and utilization of frequency spectrum for wireless access systems. It provides a systematic approach that includes geographical factors, market and traffic impacts, technical and systems aspects. This algorithm permits to estimate frequency spectrum to support both existing and planned wireless access systems. Application of this algorithm facilitates frequency planning of wireless access systems. View full abstract»

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  • Channel filters for microelectronic receivers of wireless systems

    Publication Year: 2005 , Page(s): 24 - 31
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (624 KB) |  | HTML iconHTML  

    A short overview of receiver architectures and low-pass filter specifications for wireless systems is reported. Two design procedures of low-pass filters for communication system are discussed. A CMOS transconductance-capacitor (Gm-C) filter with enhanced linearity is presented as the first one. The proposed design is based on a transconductance amplifier with enhanced linearity. For the elimination of the amplifier harmonic level the compensation principle is used. The device was realized as a balanced fifth-order 1 MHz low-pass Bessel filter in 0.35 μm CMOS process. The filter operates with a low supply voltage of +2.5 Volt. Its power consumption is 8.25 mW, the input referred RMS noise is 120 μV (0.01 + 2 MHz), and HD3 (1 VP-to-P @ 1 MHz) is -54 dB. Alternatively a new approach to the design of high-frequency filters with low power consumption is presented. The idea is to use current mode and voltage mode active elements with enhanced frequency range. These elements are second generation current conveyors and voltage buffers, those are used to implement integrators. The filter is realized as a switched-capacitor circuit based on an integrator chain with multi feedback loops. As an example a CMOS switched-capacitor filter with 1 MHz cut-off frequency is presented. The device was realized as an unbalanced fifth-order low-pass Chebyshev filter in 03 μm CMOS process. The filter operates with supply voltage varying from +2.5 V to +3 V. Depending on the supply voltage its power consumption is from 3 mW to 10 mW, the input referred RMS noise is 1.9 mV (0.02 + 2 MHz @ +3 V), and HD3 (2 VP-to-P @ 900 kHz @ +3 V) is -54 dB. View full abstract»

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  • Low consumption hybrid low-pass ARC-filters for 1 MHz band

    Publication Year: 2005 , Page(s): 32 - 35
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (232 KB) |  | HTML iconHTML  

    In contemporary electronics low consumption analog CT ARC-filters are of a great significance for employing in areas of communication, instrumentation, security systems, etc. The design of such filters for operation in 1-MHz band is not a quite ordinary problem. The traditional solution is the design of complex CMOS schematics (filter itself, frequency tuning system, etc). Meanwhile the ARC-filter, based upon a ladder RC-circuit and having the minimal number of special active elements, is rather convenient. This design provides the lower power consumption as well as simpler network. Such filter for supply voltage 2.5...3.3 V and power consumption 0.7...2.1 mW may be realized in the 0.4 mm2 are on a hybrid chip. The principles and examples of the design are considered. The goal of this work is to show the possibility to solve the design problem in a simple schematic basis. View full abstract»

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  • Synthesis of wave analogue super narrow-band filters

    Publication Year: 2005 , Page(s): 36 - 41
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    The method of synthesis of wave super narrow-band filters of a chain type with arithmetic symmetric loss characteristics is considered. The example of calculation of optical super narrow-band filter with the Chebyshev characteristic is given. View full abstract»

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  • Fast RLS with parallel computations

    Publication Year: 2005 , Page(s): 42 - 45
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (216 KB) |  | HTML iconHTML  

    The paper presents parallel forms of the sliding window fast RLS algorithms with the regularization of adaptive filter correlation matrix. The new algorithms are mathematically identical to the appropriate algorithms with sequential computations, but can be implemented by means of parallel processors. The algorithms are based on the using of the generalized matrix inversion lemma. They can be used for the processing of non-stationary signals. View full abstract»

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  • A Reconfigurable “ SFMD Architecture ” For a Class of Signal Processing Applications

    Publication Year: 2005 , Page(s): 46 - 49
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (244 KB) |  | HTML iconHTML  

    The fastest programmable DSP processors are unable to meet the speed requirements of many advanced signal processing applications. SlMD machines have been a preferred solution in such applications because of their inherent spatial parallelism. In such machines, a control unit (CU) broadcasts simple machine instructions simultaneously to a number of processing elements (PEs) executing the same instruction on different data The performance of such architectures can be vastly enhanced if the PEs can execute at the level of signal processing function rather than low level machine instruction. This can be made possible if the PEs are so designed that they can receive and execute functional level instruction from the CU instead of simple machine level instruction. FPGAs have emerged as high performance flexible hardware for many signal processing applications but they are not optimised for any particular application. Hence, they can not offer highest possible performance at lowest silicon cost for a given signal processing algorithm. This paper addresses these issues by introducing a new reconfigurable DSP processor, "single function multiple data (SFMD)" which eliminates the drawbacks of conventional SIMD machines and offers a balance between flexibility, reconfiguration latency and performance View full abstract»

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  • Optimization of the downlink frame length in adaptive systems

    Publication Year: 2005 , Page(s): 50 - 53
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    Performance and limitations of adaptive multi-user multi-carrier downlink systems in time-variant wireless channel are considered. It is shown that maximization of system throughput requires either non-uniform error protection scheme, or the same long error-correction code with optimized rate should be used. View full abstract»

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  • adaptive linearization of a power amplifier based on compression of delta-sigma modulated signals

    Publication Year: 2005 , Page(s): 54 - 57
    Cited by:  Patents (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (248 KB) |  | HTML iconHTML  

    This paper describes a novel method of adaptive linearization of power amplifier based on mixed mode processing of band-pass delta-sigma pulse stream. Our simulation results have shown significant reduction in spreading of spectra of nonlinear amplifier when adaptive feedback is used. View full abstract»

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  • Simulation of linear and non-linear effects in switched-capacitor delta-sigma modulators

    Publication Year: 2005 , Page(s): 58 - 63
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (264 KB) |  | HTML iconHTML  

    The paper presents a methodology and corresponding software tool for simulations of oversampled switched-capacitor delta-sigma modulator. It allows the analysis of non-ideal parameter influence. Among these parameters are parasitic capacitors, limited switch resistances, gain-bandwidth product of active devices. Special attention is passed to analysis of nonlinear properties of stray capacitances and active elements. Simulation of jitter effect is considered us well. The developed program Is based on nodal approach. Volterra series technique and numerical multi-dimensional inverse Laplace transform are used for the nonlinear analysis. Results are illustrated by examples. The program has been written in MATLAB. View full abstract»

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  • System identification with adaptive algorithms

    Publication Year: 2005 , Page(s): 64 - 67
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (264 KB) |  | HTML iconHTML  

    The paper presents the adaptive LMS algorithm used for system identification. The unknown system is modeled by a FIR filter. After the presentation of the theoretical approach, simulations in Labview and Matlab are provided showing the performance of the method. View full abstract»

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  • Eigenfilter based blind channel estimator

    Publication Year: 2005 , Page(s): 68 - 71
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (560 KB) |  | HTML iconHTML  

    An eigenfilter based blind channel estimation technique of estimating the channel state information for a single-input two-output system is considered by using second-order statistics information about the received signal. We showed that our design have either comparable or better estimation performance than another eigenfilter based estimation technique [M.K. Tsatsanis and Z. Xu, March 1999] with significantly lower computational complexity. The simulation results also showed the proposed algorithm can estimate the channel by observing a small amount of received signal samples. Finally, the equalization performance between the two algorithms are compared using the symbol error rate, where our algorithm is shown to outperform the one in M.K. Tsatsanis and Z. Xu (1999). View full abstract»

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  • MMSE equalizer for MIMO-ISI channel with shortened guard period

    Publication Year: 2005 , Page(s): 72 - 75
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (280 KB) |  | HTML iconHTML  

    An FIR MMSE equalizer (FIR-MMSEE) for block based transmission under the MIMO ISI channel is proposed in this paper. The proposed MMSE equalizer can get rid of the IBI problem without requiring a guard period which is not less than the channel order. By shortening the guard period, the bandwidth efficiency can be improved effectively especially for the channel with large dispersion. In addition, we further improve the BER performance of the FIR-MMSEE by propose a group successive interference cancellation MMSE equalizer (GSIC-MMSEE). In GSIC-MMSEE, a group of equalized outputs of the FIR-MMSEE is used to successively cancels their own effect in the received signals. This improves the error performance of the subsequent equalization. Moreover, because the interference cancellation is performed in group-by-group basis, the computation complexity can be controlled by adjusting the number of groups used. The performance of the FIR-MMSEE and GSIC-MMSEE was compared in the simulations. View full abstract»

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  • Analysis of the design trajectory characteristics for the minimal-time system design algorithm

    Publication Year: 2005 , Page(s): 76 - 79
    Cited by:  Papers (3)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (112 KB) |  | HTML iconHTML  

    The problem of minimal-time system design algorithm construction was discussed. The different design trajectories have been analyzed within the limits of the new system design methodology. The special geometrical dividing surface was defined and analyzed on the basis of before discovered acceleration effect. Numerical results of both passive and active nonlinear circuit design prove the possibility of the optimal or quasi-optimal design trajectory realization. View full abstract»

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  • On control vector structure for the minimal-time system design algorithm

    Publication Year: 2005 , Page(s): 80 - 83
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (112 KB) |  | HTML iconHTML  

    Some important characteristic of the time-optimal system design algorithm were studied on basis of new design methodology. Three main Ideas acceleration effect, special selection of the design process start point and control vector switch points optimal position have been defined as the basic elements for the quasi-optimal algorithm construction. The design process optimal trajectory has been evaluated on the basis of the control functions optimal behavior. The approximation of the control vector optimal structure was found by means of the special Lyapunov function of the design process. View full abstract»

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  • A tunable pre-distorter for linearization of solid state power amplifier in mobile wireless OFDM

    Publication Year: 2005 , Page(s): 84 - 87
    Cited by:  Papers (4)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (232 KB) |  | HTML iconHTML  

    One of the major problems posed by orthogonal frequency division multiplexing (OFDM) is its high peak-to-average-power ratio (PAPR), which seriously limits the power efficiency of the solid state power amplifier (SSPA) because of the nonlinear distortion caused by high PAPR. In the present paper, we describe an analytical design approach that uses a sparse and yet accurate model for the pre-distorter (PD) based on the SSPA characteristics. Furthermore, the PD configuration is self-tuning, i.e., it can automatically re-adjust itself by tracking changes in the SSPA characteristics with very few (typically two) training symbols. View full abstract»

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  • A robust and secure scheme for image communication over wireless channels

    Publication Year: 2005 , Page(s): 88 - 91
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (4568 KB) |  | HTML iconHTML  

    Chaos based encryption may offer new quality in secure data transmission. Many chaotic image encryption and decryption algorithms have been reported in the literature. However, the feature of higher compression of the still image standard JPEG200 can not be achieved on the compression of chaotic images. The error resilient tools do not correct transmission errors. Furthermore, these tools do not apply to the image header which is the most important part of the codestream. To be suitable for wireless multimedia applications, JPEG 2000 has to be robust to transmission errors. Hence, in this paper, a scheme called chaotic JPEG2000 is proposed to utilize the higher compression feature of the JPEG2000 for secure image source coding. Further, the proposed chaotic JPEG2000 is robustified by turbo channel coding for image communication over wireless channels with burst errors. The efficacy of the proposed scheme is demonstrated though implementation results for an image communication over Gaussian impulsive noisy wireless channels. View full abstract»

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