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IEEE International. 2005 Proceedings of the IEEE Workload Characterization Symposium, 2005.

Date 6-8 Oct. 2005

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  • Proceedings of the 2005 IEEE International Symposium on Workload Characterization

    Publication Year: 2005, Page(s): i
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  • IEEE International Symposium on Workload Characterization - Copyright

    Publication Year: 2005, Page(s): ii
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  • Message from the General Chair

    Publication Year: 2005, Page(s): iii
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  • Message from the Program Chair

    Publication Year: 2005, Page(s): iv
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  • IISWC-2005 people

    Publication Year: 2005, Page(s): v
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  • IISWC-2005 reviewers

    Publication Year: 2005, Page(s): vi
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  • Table of contents

    Publication Year: 2005, Page(s):vii - viii
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  • Summarizing performance is no mean feat [computer performance analysis]

    Publication Year: 2005
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (228 KB)

    For decades, computer benchmarkers have fought a war of means, arguing over proper uses of arithmetic, harmonic, and geometric means, starting in the mid-1980s. One would think this basic issue of computer performance analysis would have been long resolved, but contradictions are still present in some excellent and widely-used textbooks. This paper offers a framework that resolves these issues and... View full abstract»

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  • Exploiting program microarchitecture independent characteristics and phase behavior for reduced benchmark suite simulation

    Publication Year: 2005, Page(s):2 - 12
    Cited by:  Papers (18)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (945 KB) | HTML iconHTML

    Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to complete. Simulating the full execution of the whole benchmark suite for one architecture configuration can take months. To address this issue researchers have examined using targetted sampling based on phase behavior to significantly reduce... View full abstract»

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  • Detecting recurrent phase behavior under real-system variability

    Publication Year: 2005, Page(s):13 - 23
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (623 KB) | HTML iconHTML

    As computer systems become ever more complex and power hungry, research on dynamic on-the-fly system management and adaptations receives increasing attention. Such research relies on recognizing and responding to patterns or phases in application execution, which has therefore become an important and widely-studied research area. While application phase analysis has received significant attention,... View full abstract»

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  • A performance characterization of high definition digital video decoding using H.264/AVC

    Publication Year: 2005, Page(s):24 - 33
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB) | HTML iconHTML

    H.264/AVC is a new international video coding standard that provides higher coding efficiency with respect to previous standards at the expense of a higher computational complexity. The complexity is even higher when H.264/AVC is used in applications with high bandwidth and high quality like high definition (HD) video decoding. In this paper, we analyze the computational requirements of H.264 deco... View full abstract»

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  • The ALPBench benchmark suite for complex multimedia applications

    Publication Year: 2005, Page(s):34 - 45
    Cited by:  Papers (42)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (334 KB) | HTML iconHTML

    Multimedia applications are becoming increasingly important for a large class of general-purpose processors. Contemporary media applications are highly complex and demand high performance. A distinctive feature of these applications is that they have significant parallelism, including thread- , data-, and instruction-level parallelism, that is potentially well-aligned with the increasing paralleli... View full abstract»

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  • Reducing overheads for acquiring dynamic memory traces

    Publication Year: 2005, Page(s):46 - 55
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (349 KB) | HTML iconHTML

    Tools for acquiring dynamic memory address information for large scale applications are important for performance modeling, optimization, and for trace-driven simulation. However, straightforward use of binary instrumentation tools for such a fine-grained task as address tracing can cause astonishing slowdown in application run time. For example, in a large scale FY05 collaboration with the Depart... View full abstract»

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  • Accurate statistical approaches for generating representative workload compositions

    Publication Year: 2005, Page(s):56 - 66
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (382 KB) | HTML iconHTML

    Composing a representative workload is a crucial step during the design process of a microprocessor. The workload should be composed in such a way that it is representative for the target domain of application and yet, the amount of redundancy in the workload should be minimized as much as possible in order not to overly increase the total simulation time. As a result, there is an important trade-... View full abstract»

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  • A multi-level comparative performance characterization of SPECjbb2005 versus SPECjbb2000

    Publication Year: 2005, Page(s):67 - 75
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (454 KB) | HTML iconHTML

    SPEC has released SPECjbb2005, a new server-side Java benchmark which supersedes SPECjbb2000. SPECjbb2005 is a substantial update to SPECjbb2000, intended to make the workload more representative based on current Java development practices. SPECjbb2000 has been in existence for about five years and it has been a valuable tool for optimizing the performance of commercial JVMs as well as supporting ... View full abstract»

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  • Workload characterization of biometric applications on Pentium 4 microarchitecture

    Publication Year: 2005, Page(s):76 - 86
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB) | HTML iconHTML

    Biometric computing is a technique that uses physiological and behavioral characteristics of persons to identify and authenticate individuals. Due to the increasing demand on security, privacy and anti-terrorism, biometric applications represent the rapidly growing computing workloads. However, very few results on the execution characteristics of these applications on the state-of-the-art micropro... View full abstract»

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  • Characterization and analysis of HMMER and SVM-RFE parallel bioinformatics applications

    Publication Year: 2005, Page(s):87 - 98
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (549 KB) | HTML iconHTML

    Bioinformatics applications constitute an emerging data-intensive, high-performance computing (HPC) domain. While there is much research on algorithmic improvements, (2004), the actual performance of an application also depends on how well the program maps to the target hardware. This paper presents a performance study of two parallel bioinformatics applications HMMER (sequence alignment) and SVM-... View full abstract»

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  • Parallel processing in biological sequence comparison using general purpose processors

    Publication Year: 2005, Page(s):99 - 108
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (787 KB) | HTML iconHTML

    The comparison and alignment of DNA and protein sequences are important tasks in molecular biology and bioinformatics. One of the most well known algorithms to perform the string-matching operation present in these tasks is the Smith-Waterman algorithm (SW). However, it is a computation intensive algorithm, and many researchers have developed heuristic strategies to avoid using it, specially when ... View full abstract»

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  • Visualization techniques for system performance characterization

    Publication Year: 2005
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (227 KB)

    As computer environments increase in size and complexity, it is becoming more challenging to analyze and identify factors that limit performance and scalability. Application developers and system administrators need easy-to-use tools that enable them to quickly identify system bottlenecks and configure system for best performance. In this paper, we present techniques that allow users to view the l... View full abstract»

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  • Efficient power analysis using synthetic testcases

    Publication Year: 2005, Page(s):110 - 118
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (395 KB) | HTML iconHTML

    Power dissipation has become an important consideration for processor designs. Assessing power using simulators is problematic given the long runtimes of real applications. Researchers have responded with techniques to reduce the total number of simulated instructions while still maintaining representative simulation behavior. Synthetic testcases have been shown to reduce the number of necessary i... View full abstract»

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  • A study of Java virtual machine scalability issues on SMP systems

    Publication Year: 2005, Page(s):119 - 128
    Cited by:  Papers (2)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1524 KB) | HTML iconHTML

    This paper studies the scalability issues of Java virtual machine (JVM) on symmetrical multiprocessing (SMP) systems. Using a cycle-accurate simulator, we evaluate the performance scaling of multithreaded Java benchmarks with the number of processors and application threads. By correlating low-level hardware performance data to two high-level software constructs: thread types and memory regions, w... View full abstract»

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  • Workload characterization for the design of future servers

    Publication Year: 2005, Page(s):129 - 136
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (423 KB) | HTML iconHTML

    Workload characterization has become an integral part of the design of future servers since their characteristics can guide the developers to understand the workload requirements and how the underlying architecture would optimize the performance of the intended workload. In this paper, we give an overview of the POWER5 architecture. We also introduce the POWER5 performance monitor facilities and p... View full abstract»

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  • Understanding the causes of performance variability in HPC workloads

    Publication Year: 2005, Page(s):137 - 149
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (510 KB) | HTML iconHTML

    While most workload characterization focuses on application and architecture performance, the variability in performance also has wide ranging impacts on the users and managers of large scale computing resources. Performance variability, though secondary to absolute performance itself can significantly detract from both the overall performance realized by parallel workloads and the suitability of ... View full abstract»

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  • The FeasNewt benchmark

    Publication Year: 2005, Page(s):150 - 154
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (266 KB)

    We describe the FeasNewt mesh-quality optimization benchmark. The performance of the code is dominated by three phases - gradient evaluation, Hessian evaluation and assembly, and sparse matrix-vector products - that have very different mixtures of floating-point operations and memory access patterns. The code includes an optional runtime data- and iteration-reordering phase, making it suitable for... View full abstract»

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  • Comprehensive throughput evaluation of LANs in clusters of PCs with Switchbench - or how to bring your switch to its knees

    Publication Year: 2005, Page(s):155 - 162
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB) | HTML iconHTML

    Understanding the performance of parallel applications for prevalent clusters of commodity PCs is still not an easy task: One must understand performance characteristics of all subsystems in the cluster machine, besides the inherently required knowledge about the applications' behaviour. While there are already many benchmarks that characterise a single node's subsystems like CPU, memory and I/O. ... View full abstract»

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