Abstract
Scaling of the device dimensions has introduced various "analog" effects on-chip that are causing signal integrity and delay problems. Moreover, technology scaling is moving high-performance ICs toward higher power dissipation. Thermal conditions of the chip directly influence reliability as many of the basic mechanisms responsible for the life-time of a chip are strong functions of temperature. This tutorial discusses the fundamental mechanisms associated with integrated circuit interconnect reliability and will discuss approaches for the interconnect reliability enhancement through layout changes.
