Abstract
A large-signal modeling methodology based upon a modified BSIM3v3 transistor model is presented which targets MM-wave CMOS applications. The effect of parasitics on the high-frequency operation of CMOS transistors is discussed, and a standard intrinsic BSIM3v3 model card is augmented with lumped elements to model these effects. Core BSIM parameters are extracted to match the measured DC I-V curves of a fabricated common-source NMOS transistor. Measured S-parameters are used to extract external parasitic component values to obtain a bias-dependent small-signal MM-wave frequency fit up to 65 GHz. The large-signal MM-wave accuracy of the model is verified by measuring the output harmonics power under large-signal excitation. Comparisons of measurements with the simulations show good agreement up to 60 GHz.
