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High-Performance Polycrystalline-Silicon Nanowire Thin-Film Transistors With Location-Controlled Grain Boundary via Excimer Laser Crystallization

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7 Author(s)
Chao-Lung Wang ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; I-Che Lee ; Chun-Yu Wu ; Chia-Hsin Chou
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High-performance polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistors (TFTs) are demonstrated using excimer laser crystallization to control the locations of grain boundaries two-dimensionally. Via the locally increased thickness of the amorphous-silicon (a-Si) film as the seeds, the cross-shaped grain boundary structures were produced among these thicker a-Si grids. The NW TFTs with one primary grain boundary perpendicular to the channel direction could be therefore fabricated to achieve an excellent field-effect mobility of 346 cm2/V · s and an on/off current ratio of 3 × 109. Furthermore, the grain-boundary-location-controlled NW TFTs also exhibited better reliability due to the control of grain boundary locations. This technology is thus promising for applications of low-temperature poly-Si TFTs in system-on-panel and 3-D integrated circuits.

Published in:

Electron Device Letters, IEEE  (Volume:33 ,  Issue: 11 )

Date of Publication:

Nov. 2012

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