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Automated Range and Precision Bit-Width Allocation for Iterative Computations

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2 Author(s)
Kinsman, A.B. ; Accelyst Technol., Inc., Hamilton, ON, Canada ; Nicolici, N.

As scientific computing becomes more widespread in environments where form-factor considerations necessitate hardware acceleration, the problem of selecting numerical data representations (bit-width allocation), key to accelerator design, is faced with shortcomings in the existing techniques. To address this problem for scientific computing dataflows, we propose a methodology for determining custom hybrid fixed/floating-point data representations for iterative computations.

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:30 ,  Issue: 9 )

Date of Publication:

Sept. 2011

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