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An approach for power and performance evaluation of reconfigurable SoC at mixed abstraction levels

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5 Author(s)
Kuehnle, M. ; Inst. of Inf. Process. Technol., Karlsruhe Inst. of Technol., Karlsruhe, Germany ; Brito, A. ; Roth, C. ; Kruesselin, M.
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This work presents an analysis environment for power and performance estimation of Reconfigurable SoCs, modelled at mixed abstraction level. A monitoring strategy is integrated, that uses back-annotation of power characteristics to allow system power analysis in a SystemC simulator. A post simulation analysis tool, which contains technology dependent libraries, has been implemented to evaluate SystemC simulation results. As a case study, Ogg Vorbis was implemented on SystemC and VHDL and configured in a VirtexII Pro XC2VP30 FPGA. Results demonstrate that SystemC simulations run 28 times faster than its VHDL counterpart though providing cycle accurate modules and a high data dependent power estimation accuracy.

Published in:

Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011 6th International Workshop on

Date of Conference:

20-22 June 2011