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A 6.8 ns 1 Mb ECL I/O BiCMOS configurable SRAM

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7 Author(s)

A 1-Mb ECL (emitter coupled logic) I/O SRAM which has been fabricated using 0.8-μm BiCMOS technology is described. The die is configurable to four different organizations (1 Mb×1, 1 Mb×1 with differential output, 512 K×2 with differential output, and 256 K×4) by way of bonding options. The device, with a die size of 240 mil×475 mil, has a typical access time of 6.8 ns and is 10 K or 100 K I/O compatible with a metal option

Published in:

VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on

Date of Conference:

7-9 June 1990