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An interconnect strategy for a heterogeneous processor

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2 Author(s)

This work focuses on the interconnect infrastructure, functionality and capability of a heterogeneous reconfigurable SoC. The SoC integrates reconfigurable units of various granularity used as stream processing elements. The NoC approach demonstrates benefits in scalability, flexibility and run-time adaptivity for actual and future SoC design. On a reference CMOS090 implementation the described interconnect system works at the system frequency of 200 MHZ sustaining the required run-time bandwidth for several application domains.

Published in:

Design & Test, IEEE  (Volume:PP ,  Issue: 99 )