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The affect of cache to speedup models

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3 Author(s)
Xue Yibo ; Inst. of Comput. Technol., Acad. Sinica, Beijing, China ; Chen Lan ; Han Chengde

Speedup is usually used to reflect the effect of parallel processing systems. But the existing speedup models do not consider the effect of cache, so the effect of cache on several speedup models is analysed in this paper

Published in:

Parallel Architectures, Algorithms, and Networks, 1996. Proceedings., Second International Symposium on

Date of Conference:

12-14 Jun 1996

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