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This paper investigates multi sampled digitally controlled switched-mode power supplies with switching ripple compensation. In digital controllers for power converters, the main bandwidth limitations come from A/D conversion time, computational delays, and small-signal delay of the digital pulsewidth modulator (DPWM). In hard-wired digital-controller technologies, such as in dedicated digital IC and/or in field-programmable gate arrays (FPGAs), the calculation delays can be made negligible with respect to the switching period; thus, when fast ADCs are used, the overall phase lag is dominated by the DPWM. The multi sampling approach can strongly reduce the DPWM delay, thus breaking the bandwidth limitations of conventional single-sampled solutions. In this paper, the additional aliasing effects, which would require a filtering action, are avoided, exploiting the periodic nature of the switching ripple under steady-state conditions using a repetitive-based filtering action. Simulation and experimental results on a 1.2-V-10-A 500-kHz synchronous buck converter, where the digital control has been implemented in the FPGA, confirm the properties of the proposed solution.
Date of Publication: April 2008