Skip to Main Content
A fractional spur elimination technique that enables wide-bandwidth phase interpolation-based fractional-N phase-locked loops (PLLs) is proposed. The technique uses specially filtered dither to eliminate the spurious tones otherwise caused by inevitable phase errors. The design of a wide-bandwidth fractional-N PLL based on the spur elimination technique and a theoretical proof of the proposed technique are presented.
Circuits and Systems I: Regular Papers, IEEE Transactions on (Volume:55 , Issue: 6 )
Date of Publication: July 2008