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A 35 ns 64 Mb DRAM using on-chip boosted power supply

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8 Author(s)
Dong-Jae Lee ; Samsung Electron. Co., Kyungki-Do, South Korea ; Yong-Sik Seok ; Do-Chan Choi ; Jae-Hyeong Lee
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An on-chip boosted power supply is necessary for ease of layout and high speed in high density DRAMs. The technique of TTL conversion is a key to designing high speed DRAMs for 3-V operation. The authors present the generation and regulation of an on-chip power supply (V/sub pp/) within 50 mV of the optimum level during operation for a given V/sub cc/. In addition to the regulated V/sub cc/ scheme, improved interface circuit techniques are employed to achieve fast input and output conversion with good noise margins. An experimental 64-Mb DRAM is designed. A typical access time of 35 ns is obtained by measurement.<>

Published in:

VLSI Circuits, 1992. Digest of Technical Papers., 1992 Symposium on

Date of Conference:

4-6 June 1992