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A one-dimensional analytical model for III-V compound deep-depletion-mode MISFET's is developed. The model calculates transconductance, drain resistance, and gate capacitance beyond current saturation where these devices are normally operated-a regime not treated by other MISFET models. It is shown that insulator thicknesses less than 50 nm and surface state densities less than 1 × 1012eV-1. cm-2will be required for optimum MISFET devices. In a comparison of the expected performance differences between GaAs, InP, and InGaAs FET devices with similar geometries, it is shown that InP and InGaAs MISFET's will have lower gate capacitance, a greater cut-off frequency, and up to 2-dB improvement in minimum noise figure compared with a GaAs MESFET. Device characteristics predicted by this model agree with measured values to an accuracy of ±20 percent, which is well within the accuracy with which the modeled input parameters can be measured. This represents a factor of two improvement in accuracy when compared to other MISFET models. The model predicts the characteristics expected for a MESFET device in the limit of zero insulator thickness.