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Using cache mapping to improve memory performance handheld devices

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2 Author(s)
Rong Xu ; Dept. of Comput. Sci., Purdue Univ., West Lafayette, IN, USA ; Zhiyuan Li

Processors such as the Intel StrongARM SA-1110 and the Intel XScale provide flexible control over the cache management to achieve better cache utilization. Programs can specify the cache mapping policy for each virtual page, i.e. mapping it to the main cache, the mini-cache, or neither. For the latter case, the page is marked as non-cacheable. In this paper, we use memory profiling to guide such page-based cache mapping. We model the cache mapping problem and prove that finding the optimal cache mapping is NP-hard. We then present a heuristic to select the mapping. Execution time measurement shows that our heuristics can improve the performance from 1% to 21% for a set of test programs. As a byproduct of performance enhancement, we also save the energy by 4% to 28%.

Published in:

Performance Analysis of Systems and Software, 2004 IEEE International Symposium on - ISPASS

Date of Conference:

2004

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