A 65 nm CMOS 30 dBm Class-E RF Power Amplifier With 60% PAE and 40% PAE at 16 dB Back-Off
Apostolidou, M.
van der Heijden, M.P.
Leenaerts, D.M.W.
Sonsky, J.
Heringa, A.
Volokhine, I.
NXP Semicond. Res., Eindhoven;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: May 2009
Volume: 44,
Issue: 5
On page(s): 1372-1379
ISSN: 0018-9200
INSPEC Accession Number: 10627476
Digital Object Identifier: 10.1109/JSSC.2009.2020680
Current Version Published: 2009-05-02
Abstract
A 30 dBm single-ended class-E RF power amplifier (PA) is fabricated in a baseline 65 nm CMOS technology. The PA is constructed as a cascode stage formed by a standard thin-oxide device and a dedicated novel high voltage extended-drain thick-oxide device. Both devices are implemented without using additional masks or processing steps. The proposed PA uses an innovative self-biasing technique to ensure high power-added efficiency (PAE) at both high output power (Pout) and power back-off levels. At 2 GHz, the PA achieves a PAE of 60% at a Pout of 30 dBm and a PAE of 40% at 16 dB back-off. Stress tests indicate the reliability of both the novel high voltage device and the design.
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