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Fermi level pinning at the polySi/metal oxide interface
Hobbs, C. Fonseca, L. Dhandapani, V. Samavedam, S. Taylor, B. Grant, J. Dip, L. Triyoso, D. Hegde, R. Gilmer, D. Garcia, R. Roan, D. Lovejoy, L. Rai, R. Hebert, L. Tseng, H. White, B. Tobin, P.
Digital DNA Lab., APRDL, Austin, TX, USA;

This paper appears in: VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
Publication Date: 10-12 June 2003
On page(s): 9- 10
ISSN:
ISBN: 4-89114-033-X
INSPEC Accession Number: 7853457
Current Version Published: 2003-08-18

Abstract
We report here for the first time that Fermi pinning at the polySi/metal oxide interface causes high threshold voltages in MOSFET devices. Results indicate that pinning occurs due to the interfacial Si-Hf and Si-O-Al bonds for HfO₂ and Al₂O₃, respectively. This fundamental characteristic also affects the observed polySi depletion. Device data and simulation results will be presented.

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