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On the complexity of gate duplication
Srivastava, A.   Kastner, R.   Sarrafzadh, M.  
Dept. of Comput. Sci., California Univ., Los Angeles, CA;

This paper appears in: Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publication Date: Sep 2001
Volume: 20,  Issue: 9
On page(s): 1170-1176
ISSN: 0278-0070
References Cited: 9
CODEN: ITCSDI
INSPEC Accession Number: 7037952
Digital Object Identifier: 10.1109/43.945312
Current Version Published: 2002-08-07

Abstract
In this paper, we show that both the global and local gate duplication problems for delay optimization are NP-complete under certain delay models

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