A 550-MSample/s 8-Tap FIR digital filter for magnetic recordingread channels
Staszewski, R.B.
Muhammad, K.
Balsara, P.
Texas Instrum. Inc., Dallas, TX;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Aug 2000
Volume: 35,
Issue: 8
On page(s): 1205-1210
ISSN: 0018-9200
References Cited: 14
CODEN: IJSCBC
INSPEC Accession Number: 6693535
Digital Object Identifier: 10.1109/4.859511
Current Version Published: 2002-08-06
Abstract
An area-efficient low-power and low-latency 550-MSample/s FIR
filter for magnetic recording read channel applications is presented. A
parallel direct type II architecture operates on real-time deinterleaved
(even and odd) input data samples and employs a fast low-area multiplier
based on selection of radix-8 premultiplied coefficients in conjunction
with one-hot encoded bus leading to a very compact layout and reduced
power dissipation. The chip has been fabricated using a 0.18-μm
L-effective CMOS technology and is currently being used in commercial
applications
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