Inductance characterization of small interconnects usingtest-signal method
Shah, J.T.
Desai, M.P.
Sanyal, S.
Indian Inst. of Technol., Bombay;
This paper appears in: VLSI Design, 2000. Thirteenth International Conference on
Publication Date: 2000
On page(s): 376-379
Meeting Date: 01/03/2000 - 01/07/2000
Location: Calcutta, India
ISBN: 0-7695-0487-6
References Cited: 7
INSPEC Accession Number: 6577025
Digital Object Identifier: 10.1109/ICVD.2000.812636
Current Version Published: 2002-08-06
Abstract
The test signal method can be used to measure and model inductance
parameters (self and mutual) of a very small interconnect especially in
high-density ICs by using a test signal (of small known amplitude and
frequency) and a DC signal along with a differential circuit. Other
measurement techniques such as LCZ and TDR for measuring inductance
parameters are faced with limitations of L values greater than 5nH. The
test signal injection compliments this method and facilitates
measurement of very low L values, especially those encountered in high
speed circuits. This technique is applicable in the designing and
benchmarking stage and hence is used to model interconnect couplings
before packaging and polysilicon layout. An account of
interconnect-substrate effects causing displacement currents that result
in self-inductive effects is given. Small interconnects have been
modeled as lumped elements of a transmission line to form a full system
integrity analysis of the test signal injection method circuitry for
circuit simulation using SPICE. A careful simulation procedure was
carried out to determine the input parameters of test signal amplitude
and frequency to accommodate the parasitics of the interconnect under
characterization
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