Novel cell isolation technique for the analysis of CMOS SRAM cellcold failure
Yit-Wooi Lim
Teong-San Yeoh
Intel Technol. Sdn. Bhd., Penang;
This paper appears in: Semiconductor Electronics, 1998. Proceedings. ICSE '98. 1998 IEEE International Conference on
Publication Date: 1998
On page(s): 64-69
Meeting Date: 11/24/1998 - 11/26/1998
Location: Bangi, Malaysia
ISBN: 0-7803-4971-7
References Cited: 1
INSPEC Accession Number: 6430646
Digital Object Identifier: 10.1109/SMELEC.1998.781151
Current Version Published: 2002-08-06
Abstract
CMOS SRAM cell cold failure analysis is not easily performed under
a room temperature environment. However, by using the signature analysis
method, the transistor failure cell can be identified by directly
measuring the transistor parameters from the isolated SRAM cell. The
cell isolation technique for signature analysis is sensitive enough to
capture the abnormal electrical signature of the SRAM cell cold failure.
The technique was used on the analysis of SRAM cell cold failure from a
2-layer metal fab process. The SRAM cell and its transistors were
physically and electrically isolated without any problem. The failure
signature of the SRAM cell cold failure which failed stuck at
“1” at a single bit address during testing, was successfully
analyzed. N+ drain junction leakage and threshold voltage degradation
was identified as the root cause of the cold failure
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