Symmetry detection for automatic analog-layout recycling
Bourai, Y.
Shi, C.-J.R.
Dept. of Electr. Eng., Washington Univ., Seattle, WA;
This paper appears in: Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific
Publication Date: 18-21 Jan 1999
On page(s): 5-8 vol.1
Meeting Date: 01/18/1999 - 01/21/1999
Location: Wanchai, Hong Kong
ISBN: 0-7803-5012-X
References Cited: 11
INSPEC Accession Number: 6358236
Digital Object Identifier: 10.1109/ASPDAC.1999.759663
Current Version Published: 2002-08-06
Abstract
Layout symmetry is used to minimize the impact of mismatch on the
performance of analog circuits. In this paper, an efficient algorithm is
presented to detect automatically the mask layout symmetry. It consists
of identifying signal nets, isolating circuit devices and detecting
their symmetry, and finally, synthesizing the layout symmetry. Combined
with layout compaction with symmetry constraints, this technique
provides a methodology for automatic analog-layout recycling
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