Synthesis of application-specific memory designs
Schmit, H.
Thomas, D.E.
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Mar 1997
Volume: 5,
Issue: 1
On page(s): 101-111
Meeting Date: 09/13/1995 - 09/15/1995
Location: Cannes, France
ISSN: 1063-8210
References Cited: 25
CODEN: IEVSE9
INSPEC Accession Number: 5525491
Digital Object Identifier: 10.1109/92.555990
Current Version Published: 2002-08-06
Abstract
This paper discusses the mapping of arrays in a behavior to
memories in an implementation. We introduce a novel approach to the
design of memory systems, which is based on a variety of array grouping
techniques and dimensional transformations, and the binding of array
groups to memory components with different dimensions, access times, and
number of ports. The results of design actions are computed in terms of
memory cost, the number of wires necessary to connect the memory to the
data path, and the limit of performance imposed by the memory design on
the implementation. Three different procedures can be used to find a
suitable memory design. All three procedures are directed by a weighted
and constrained system cost function, which enables the expression of
the user's design priorities. Compared to related research efforts, our
approach improves performance by as much as 19%, reduces memory cost as
40%, and decreases the number of wires required to connect the memory to
the data path by up to 57%
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