Continuous signature monitoring: low-cost concurrent detection ofprocessor control errors
Wilken, K.
Shen, J.P.
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA;
This paper appears in: Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publication Date: Jun 1990
Volume: 9,
Issue: 6
On page(s): 629-641
Meeting Date: 09/12/1988 - 09/14/1988
Location: Washington, DC, USA
ISSN: 0278-0070
References Cited: 36
CODEN: ITCSDI
INSPEC Accession Number: 3721465
Digital Object Identifier: 10.1109/43.55193
Current Version Published: 2002-08-06
Abstract
A low-cost approach to concurrent detection of processor control
errors is presented that uses a simple hardware monitor and signatures
embedded into the executing program. Existing signature-monitoring
techniques detect a large portion of processor control errors at a
fraction of the cost of duplication. Analytical methods developed in
this study show that the new approach, continuous signature monitoring
(CSM), makes major advances beyond existing techniques. CSM reduces the
fraction of undetected control-flow errors by orders of magnitude, to
less than 10-6, while the number of signatures reaches a
theoretical minimum, being lowered by as much as three times to a range
of 4-11%. Signature cost is reduced by placing CSM signatures at
locations that minimize performance loss and (for some architectures)
memory overhead. CSM exploits the program memory's SEC/DED code to
decrease error-detection latency by as much as 1000 times, to 0.016
program memory cycles, without increasing memory overhead. This short
latency allows transient faults to be tolerated
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