Array mapping in behavioral synthesis
Schmit, H.
Thomas, D.E.
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA;
This paper appears in: System Synthesis, 1995., Proceedings of the Eighth International Symposium on
Publication Date: 13-15 Sep 1995
On page(s): 90-95
Meeting Date: 09/13/1995 - 09/15/1995
Location: Cannes, France
ISBN: 0-8186-7076-2
References Cited: 16
INSPEC Accession Number: 5087881
Digital Object Identifier: 10.1109/ISSS.1995.520618
Current Version Published: 2002-08-06
Abstract
This paper discusses the mapping of arrays in a behavior to
memories in an implementation. We introduce a design representation
based on a variety of array grouping techniques and the binding of array
groups to memory components with different dimensions, access times, and
number of ports. The results of design actions are computed in terms of
the number of memory components and the length of schedules in the
behavior. We demonstrate the ability of a synthesis tool using this
representation to generate designs that span the entire range of the
memory design space
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