Barrier layer multilayer ceramic capacitor processing: effects oftermination and plating process parameters
Anderson, F.R.
Haynes, R.
Pinault, S.C.
AT&T Bell Lab., Princeton, NJ;
This paper appears in: Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publication Date: Dec 1989
Volume: 12,
Issue: 4
On page(s): 609-612
Meeting Date: 05/22/1989 - 05/24/1989
Location: Houston, TX, USA
ISSN: 0148-6411
References Cited: 6
CODEN: ITTEDR
INSPEC Accession Number: 3606812
Digital Object Identifier: 10.1109/33.49023
Current Version Published: 2002-08-06
Abstract
The authors report studies on the effects of termination and
plating process parameters on fabrication of multilayer ceramic
capacitors intended for use as surface-mount devices. The parameters in
this study included: three capacitor lots, eight termination ink types,
seven termination band heights, two termination crown heights, the
number of columns for nickel plating, and the time and current density
for solder plating. Fifty experiments were performed; nine of these
experiments were repeated to estimate experimental error. As response
variables, 1830 data points each were measured for capacitance,
dissipation factor (DF), and internal resistance. Four of the
termination inks can be ranked together as statistically better than the
other four studied. They are Dupont 4506, A, B, and dual-layer (4506
fired, 10 mils/1172D). A and B are inks formulated for the AT&T
dielectric by a commercial vendor. B is ranked best for DF,
DF spread, and conductance and is indistinguishable (at 90%
confidence levels) from the other three for conductance spread.
Termination crown height and bandwidth and solder plating had
significant effects whereas nickel plating had no effect
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