A Low-Power Protocol Processor Based on NAND-Type TCAMs for Networked Sensors
Xin Xiaoning
Yu Haibin
Cui Shuping
Shenyang Inst. of Autom. Chinese Acad. of Sci., Grad. Univ. of Chinese Acad. of Sci., Shenyang;
Abstract
A Protocol Processing Accelerator based on low- power NAND-type Ternary Content Addressable Memories (TCAMs) is present in this paper. The fundamental constraint of a network sensor is the energy consumption, the high requirement on clock frequency of the microcontroller for protocol data receiving is one of the primary reasons causing high energy consumption. Protocol processing based on hardware usually has better energy efficiency than software, but the hardware accelerator for networked sensors is difficult to design due to no standard protocols. TCAMs are hardware-based parallel lookup tables with bits masking. Programmable state machine circuits with one clock cycle search operation capability can be designed with TCAMs. A novel decoding logic "dual TCAM" cell is proposed for the design of low-power high performance TCAMs. A general purpose protocol processor is designed with cascade of such TCAM state machines. It can be used to detect any start or end symbols defined by users in systems using Manchester or NRZ encodings, which can greatly improve the energy efficiency of a networked sensor.
Index
Terms
Available to subscribers and IEEE members.
References
Available to subscribers and IEEE members.
Citing Documents
Available to subscribers and IEEE members.
Cart
