Sequential circuit design using synthesis and optimization
Sentovich, E.M.
Singh, K.J.
Moon, C.
Savoj, H.
Brayton, R.K.
Sangiovanni-Vincentelli, A.
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA;
Abstract
A description is given of SIS, an interactive tool for synthesis
and optimization of sequential circuits. Given a state transition table
or a logic-level description of a sequential circuit, SIS produces an
optimized net-list in the target technology while preserving the
sequential input-output behavior. Many different programs and algorithms
have been integrated into SIS, allowing the user to choose among a
variety of techniques at each stage of the process. It is built on top
of MISII and includes all (combinational) optimization techniques
therein as well as many enhancements. SIS serves as both a framework
within which various algorithms can be tested and compared and as a tool
for automatic synthesis and optimization of sequential circuits
Index
Terms
Available to subscribers and IEEE members.
References
Available to subscribers and IEEE members.
Citing Documents
Available to subscribers and IEEE members.
Cart
