Optimization of cyclic redundancy-check codes with 24 and 32 paritybits
Castagnoli, G.
Brauer, S.
Herrmann, M.
This paper appears in: Communications, IEEE Transactions on
Publication Date: Jun 1993
Volume: 41,
Issue: 6
On page(s): 883-892
ISSN: 0090-6778
References Cited: 16
CODEN: IECMBT
INSPEC Accession Number: 4520815
Digital Object Identifier: 10.1109/26.231911
Current Version Published: 2002-08-06
Abstract
The method developed by T. Fujiwara et al. (1985) for efficiently
computing the minimum distance of shortened Hamming codes using the
weight distribution of their dual codes is extended to treat arbitrary
shortened cyclic codes. Using this method implemented on a high-speed
special-purpose processor, several classes of cyclic redundancy-check
(CRC) codes with 24 and 32 parity bits are investigated. The CRC codes
of each class are known to have the same minimum distance
dmin.L in a certain range L of block
lengths n, and within each class that CRC code has been
determined the minimum distance of which exceeds dmin.L
up to the largest block length. The dmin
profiles of the resulting codes are presented and compared with the
dmin profiles of recent suggestions of P. Merkey and
E. C. Posner (1984), as well as with the dmin
profile of the widely used 32 parity-bit standard code recommended in
IEEE-802
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